Semiconductor die, semiconductor package and substrate dicing method
US-2024421000-A1 · Dec 19, 2024 · US
US9508595B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9508595-B2 |
| Application number | US-201514927845-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 30, 2015 |
| Priority date | Jul 1, 2013 |
| Publication date | Nov 29, 2016 |
| Grant date | Nov 29, 2016 |
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A design method includes a process of preparing plural cutting members having different degrees of taper in a tip portion thereof, a process of preparing plural grooves on a front surface side having the same shape, a process of confirming a breakage status when a groove on a rear surface side is formed by the plural cutting members, and a process of selecting, when it is confirmed that both of a cutting member that causes breakage and a cutting member that does not cause the breakage are included, the degree of taper of the cutting member that does not cause the breakage as a tip shape of a cutting member to be used in a mass production process.
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What is claimed is: 1. A design method of a tip shape of a cutting member used in a semiconductor piece manufacturing method including forming a groove on a front surface side on a front surface of a substrate, and forming a groove on a rear surface side that communicates with the groove on the front surface side by a rotating cutting member that has a thickness larger than the width of the groove on the front surface side from a rear surface of the substrate and individualizing…
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