Hermetic electronics package with dual-sided electrical feedthrough configuration

US9504177B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9504177-B2
Application numberUS-201214118192-A
CountryUS
Kind codeB2
Filing dateJun 14, 2012
Priority dateJun 14, 2011
Publication dateNov 22, 2016
Grant dateNov 22, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A hermetic electronics package includes a metal case with opposing first and second open ends, with each end connected to a first feedthrough construction and a second feedthrough construction. Each feedthrough contruction has an electrically insulating substrate and an array of electrically conductive feedthroughs extending therethrough, with the electrically insulating substrates connected to the opposing first and second open ends, respectively, of the metal case so as to form a hermetically sealed enclosure. A set of electronic components are located within the hermetically sealed enclosure and are operably connected to the feedthroughs of the first and second feedthrough constructions so as to electrically communicate outside the package from opposite sides of the package.

First claim

Opening claim text (preview).

We claim: 1. A hermetically-sealed electronics device comprising: a hermetic electronics package comprising: a metal case with opposing first and second open ends; a first feedthrough construction having an electrically insulating substrate and an array of electrically conductive feedthroughs extending therethrough; a second feedthrough construction having an electrically insulating substrate and an array of electrically conductive feedthroughs extending therethrough; said electrically insulating substrates of the first and second feedthrough constructions connected to the opposing first and second open ends, respectively, of the metal case so as to form a hermetically sealed enclosure; and a set of electronic components located within the hermetically sealed enclosure and operably connected to the feedthroughs of the first and second feedthrough constructions; a first electrode array having a plurality of traces extending between electrodes at a lead end and a connector end that is connected to the feedthroughs of the first feedthrough construction to transmit electrical signals between the set of electronic components and a surrounding region adjacent the first electrode array; and a second electrode array having a plurality of traces extending between electrodes at a lead end and a connector end that is connected to the feedthroughs of the second feedthrough construction to transmit electrical signals between the set of electronic components and a surrounding region adjacent the second electrode array, whereby the first and second electrode arrays are positioned to electrically interact with said adjacent surrounding regions from opposite sides of the package. 2. The hermetically-sealed electronics device of claim 1 , wherein the set of electronic components comprises a first subset fixedly connected to the first feedthrough construction and electrically connected to the feedthroughs thereof, and a second subset fixedly connected to the second feedthrough construction and electrically connected to the feedthroughs thereof. 3. The hermetically-sealed electronics device of claim 1 , wherein the set of electronic components comprises a subset fixedly connected to the first feedthrough construction and electrically connected to the feedthroughs thereof, and a cable electrically connecting the subset to the feedthroughs of the second feedthrough construction. 4. The hermetically-sealed electronics device of claim 1 , wherein the metal case with opposing first and second open ends comprises two shorter metal cases connected end-to-end. 5. The hermetically-sealed electronics device of claim 1 , wherein the electrically conductive feedthroughs are a bio-compatible metal. 6. The hermetically-sealed electronics device of claim 5 , wherein the electrically conductive bio-compatible metal is selected from the group consisting of titanium, platinum, iridium, ruthenium, niobium, palladium, gold, stainless steel, p- or n-type doped silicon, and alloys thereof. 7. The hermetically-sealed electronics device of claim 1 , wherein the electrically insulating material is selected from the group consisting of glass, polymer, ceramic, and other dielectric materials. 8. The hermetically-sealed electronics device of claim 1 , wherein the electrically insulating substrate is a bio-compatible material. 9. The hermetically-sealed electronics device of claim 1 , wherein the electrically insulating bio-compatible material is selected from the group consisting of sealing glasses, non-leaded glass, boro-silicate glass, glass-frit powder or paste, and glasses or ceramics containing one or more of B 2 O 3 , CaO, BaO, SiO 2 , La 2 O 3 , Al 2 O 3 , Li 2 O 3 , TiO 2 . 10. A method of fabricating a hermetic electronics package, comprising: bonding a first electrically insulating substrate of a first feedthrough construction having the first electrically insulating substrate and a first array of electrically conductive feedthroughs extending therethrough, to a first open end of a first metal case having opposing first and second open ends; bonding a second electrically insulating substrate of a second feedthrough construction having the second electrically insulating substrate and a second array of electrically conductive feedthroughs extending therethrough, to a first open end of a second metal case having opposing first and second open ends; fixedly connecting a set of electronic components to at least one of the first and second feedthrough constructions and electrically connecting to at least one of the first and second feedthrough arrays; and bonding the second open ends of the first and second metal cases together so as to form a hermetically sealed enclosure containing the set of electronic components from which the set of electronic components may electrically communicate outside tile package from opposite sides thereof via first and second electrode arrays each having a lead end and a connector end electrically connected to a corresponding one of the first and second feedthrough arrays. 11. The method of claim 10 , wherein prior to the bonding of the second open ends, the step of fixedly connecting the set of electronic components includes fixedly connecting a first subset to the first feedthrough construction and electrically connecting the first subset to the feedthroughs of the first feedthrough construction, and fixedly connecting a second subset to the second feedthrough construction and electrically connecting the second subset to the feedthroughs of the second feedthrough construction. 12. The method of claim 10 , wherein prior to the bonding of the second open ends, the step of fixedly connecting the set of electronic components includes fixedly connecting a subset of electronic components to the first feedthrough construction and electrically connecting the subset to the feedthroughs of the first feedthrough construction, and electrically connecting a cable between the subset and the feedthroughs of the second feedthrough construction.

Assignees

Inventors

Classifications

  • Through-vias · CPC title

  • Detecting, measuring or recording bioelectric or biomagnetic signals of the body or parts thereof · CPC title

  • Electricity · mapped topic

  • H05K5/069Primary

    Other details of the casing, e.g. wall structure, passage for a connector, a cable, a shaft · CPC title

  • Electricity · mapped topic

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What does patent US9504177B2 cover?
A hermetic electronics package includes a metal case with opposing first and second open ends, with each end connected to a first feedthrough construction and a second feedthrough construction. Each feedthrough contruction has an electrically insulating substrate and an array of electrically conductive feedthroughs extending therethrough, with the electrically insulating substrates connected to…
Who is the assignee on this patent?
Shah Kedar G, Pannu Satinderpall S, L Livermore Nat Security Llc
What technology area does this patent fall under?
Primary CPC classification H05K5/069. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).