Method of manufacturing a multilayer semiconductor element, and a semiconductor element manufactured as such

Patent metadata

Field	Value
Publication number	US-9502654-B2
Application number	US-201314436363-A
Country	US
Kind code	B2
Filing date	Oct 18, 2013
Priority date	Oct 18, 2012
Publication date	Nov 22, 2016
Grant date	Nov 22, 2016

Abstract

The present invention is directed to a method of manufacturing a multilayer semiconductor element. According to this method a first device layer is provided on a carrier by solution printing of a first material on the carrier. A second device layer is provided by solution printing of a second material solution on said first device layer; the second material solution comprising second device layer material dissolved in a solvent. Prior to solution printing of the second device layer, a barrier interlayer is added onto the first layer for being arranged in between said first and said second device layer. The barrier interlayer comprises an interlayer material insoluble to said solvent, and arranged for enabling electric interaction between the first and second device layer. The invention further provides a semiconductor element.

First claim

The invention claimed is:

1. Method of manufacturing a multilayer semiconductor element, said method comprising the steps of:
providing a carrier;
providing a first device layer on said carrier by solution printing of a first material solution for forming said first device layer; and
providing a second device layer by solution printing of a second material solution on said first device layer, said second material solution comprising second device layer material dissolved in a solvent;

wherein said method comprises a step of providing prior to providing said second device layer a barrier interlayer for being arranged in between said first and said second device layer, said barrier interlayer comprising an interlayer material being insoluble to said solvent, wherein said interlayer material is a semiconductor material, and said barrier interlayer being arranged for enabling electric interaction between said first device layer and said second device layer.

2. Method according to claim 1 , wherein said semiconductor material having a band gap larger than or equal to a band gap distance of said first or said second device layer.

3. Method according to claim 1 , wherein providing of said barrier interlayer comprises a step of atomic layer deposition for forming said barrier interlayer on said first device layer.

4. Method according to claim 3 , wherein said step of atomic layer deposition at least comprises a step of relatively moving said carrier and one or more precursor gas sources past one another.

5. Method according to claim 1 , wherein said barrier interlayer is provided having a thickness dependent on said interlayer material, for effectively preventing said solvent to reach said first device layer, and for allowing said electric interaction between said first device layer and said second device layer.

6. Method according to claim 5 , wherein said barrier interlayer is provided having said thickness within a range of at least one monolayer for a semiconductor type barrier interlayer.

7. Method according to claim 1 , wherein said interlayer material comprises a semiconductor material, and wherein said semiconductor material comprises at least one of a group comprising doped or undoped oxide semiconductor materials and oxide semiconductor materials comprising substoichiometric oxide, such as doped or undoped ZnO, doped or undoped SnOx such as ITO, doped or undoped ZrOx, doped or undoped InOx, doped or undoped RuOx, doped or undoped WOx, doped or undoped EuOx, doped or undoped NiOx, doped or undoped VOx, doped or undoped PbOx, doped or undoped CeOx, doped or undoped MoOx, doped or undoped Ni2O3, or doped or undoped ZnxSnyOz, and non-oxide semiconductor materials, such as doped or undoped ZnS, and doped or undoped ZnSe, ZnTe, CdS, and CdSe, and organic semiconductor materials, such as AlxGayIn1−x−yN or other semiconductor nitrides or sulfides.

8. Method according to claim 1 , wherein said multilayer semiconductor device comprises a multilayer organic semiconductor element.

9. Method according to claim 8 , wherein said multilayer organic semiconductor element is an organic light emitting diode (OLED) or an organic photo voltaic element (OPV).

Assignees

• Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek Tno

Inventors

• Spee Carolus Ida Maria Antonius
• Blom Paulus Wilhelmus Maria
• Levell Jack W

Classifications

• H10K71/611

  using printing deposition, e.g. ink jet printing · CPC title

• C23C16/45551 Primary

  for relative movement of the substrate and the gas injectors or half-reaction reactor compartments · CPC title

• H01L51/44

  Electricity · mapped topic

• H01L51/5012

  Electricity · mapped topic

• H01L51/56

  Electricity · mapped topic