High frequency switching MOSFETs with low output capacitance using a depletable P-shield

Patent metadata

Field	Value
Publication number	US-9502554-B2
Application number	US-201615004805-A
Country	US
Kind code	B2
Filing date	Jan 22, 2016
Priority date	Dec 21, 2012
Publication date	Nov 22, 2016
Grant date	Nov 22, 2016

Abstract

Aspects of the present disclosure describe a high density trench-based power MOSFETs with self-aligned source contacts and methods for making such devices. The source contacts are self-aligned with spacers. The MOSFETS also may include a depletable shield in a lower portion of the substrate. The depletable shield may be configured such that during a high drain bias the shield substantially depletes. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

First claim

What is claimed is:

1. A MOSFET device, comprising:
a semiconductor substrate of a first conductivity type wherein the substrate includes a lightly doped epitaxial region in a top portion of the substrate;
a body region of a second conductivity type formed in a top portion of the semiconductor substrate, wherein the second conductivity type is opposite the first conductivity type;
a plurality of active device structures formed from the semiconductor substrate and body region, wherein each active device structure in the plurality of active device structures comprises a gate electrode in a gate trench formed in the semiconductor substrate, wherein the gate electrode is insulated from the substrate and body region by a gate oxide, whereby there are a plurality of gate electrodes in a corresponding plurality of gate trenches; a depletable shield of the second conductivity type formed in the semiconductor substrate between first and second gate trenches of the plurality of gate trenches and extending vertically from above a gate trench bottom down to below the gate trench bottom and separated from the body region by a drift region of the first conductivity type, wherein the depletable shield is electrically connected to the body region; an insulative layer over a top surface of the body region; a conductive source metal layer formed over the insulative layer; and one or more electrical connections that connect the source metal layer with one or more source regions.

2. The device of claim 1 , wherein one or more of the depletable shields extend through the substrate to a drain contact of the first conductivity type formed in a bottom portion of the substrate.

3. The device of claim 1 , wherein the depletable shield extends laterally from a sidewall of a first trench to a sidewall of a second trench.

4. The device of claim 1 , wherein the connection between the depletable shield and the body layer is made in a primary plane of the device.

5. The device of claim 1 , wherein the connection between the depletable shield and the body layer is made in a secondary plane of the device, wherein the secondary plane of the device is orthogonal to a primary plane of the device.

6. The device of claim 5 , wherein a disconnected portion of the depletable shield is disconnected from the body layer, wherein the disconnected portion of the depletable shield is spaced apart from a connected portion of the depletable shield by a portion of the substrate configured to connect an epitaxial region of the first conductivity type formed proximate to the trenches to a drain contact of the first conductivity type formed in a bottom portion of the substrate, wherein the connected portion of the depletable shield is connected to the body layer.

7. The device of claim 6 , wherein the disconnected portion of the depletable shield continuously extends below two or more trenches in the primary plane and is configured to form an orthogonal super-junction structure with the portion of the substrate configured to connect the epitaxial region to the drain contact.

8. The MOSFET device of claim 1 , further comprising: a plurality of source regions of the first conductivity type formed in a top portion of the semiconductor substrate proximate to the plurality of trenches.

9. The MOSFET device of claim 1 , further comprising one or more electrostatic discharge (ESD) protection features.

10. The MOSFET device of claim 1 , further comprising one or more a gate pickup trenches.

11. The MOSFET device of claim 1 , further comprising a Schottky contact.

12. The MOSFET device of claim 11 , wherein the Schottky contact further comprises a body clamp structure.

Assignees

• Alpha & Omega Semiconductor

Inventors

• Bobde Madhur
• Yilmaz Hamza
• Lui Sik
• Ng Daniel

Classifications

• H10P32/1414

  the applied layer being silicon, silicide or SIPOS, e.g. polysilicon or porous silicon · CPC title

• H10P32/171

  being group IV material · CPC title

• H10D64/519

  characterised by their top-view geometrical layouts · CPC title

• H10D64/516

  the thicknesses being non-uniform · CPC title

• H10D64/256

  for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673) · CPC title