Semiconductor device

Patent metadata

Field	Value
Publication number	US-9502320-B2
Application number	US-201514933634-A
Country	US
Kind code	B2
Filing date	Nov 5, 2015
Priority date	Nov 21, 2014
Publication date	Nov 22, 2016
Grant date	Nov 22, 2016

Abstract

A semiconductor device includes an insulating substrate including a metal plate, an insulating plate, and a circuit plate laminated sequentially in order; a semiconductor element fixed to the circuit plate; a wiring member connected to an electrode provided on a surface of the semiconductor element, the circuit plate, or the electrode and the circuit plate; a plastic housing having a hollow shape to receive the insulating substrate, the semiconductor element, and the wiring member therein, the plastic housing having an inner frame on an inner surface and a step formed in a front end of the inner frame; and a sealing material made of a thermosetting resin to seal the insulating substrate, the semiconductor element, and the wiring member inside the plastic housing.

First claim

What is claimed is:

1. A semiconductor device comprising:
an insulating substrate including a metal plate, an insulating plate, and a circuit plate laminated sequentially in order;
a semiconductor element fixed to the circuit plate;
a wiring member connected to an electrode provided on a surface of the semiconductor element, the circuit plate, or the electrode and the circuit plate;
a plastic housing having a hollow shape to receive the insulating substrate, the semiconductor element, and the wiring member therein, the plastic housing having an inner frame on an inner surface and a step formed in a front end of the inner frame; and
a sealing material made of a thermosetting resin to seal the insulating substrate, the semiconductor element, and the wiring member inside the plastic housing.

2. The semiconductor device according to claim 1 , wherein the step is formed in an upper surface of the inner frame.

3. The semiconductor device according to claim 1 , further comprising:
a plurality of conductive members each extending from an inner side of the plastic housing toward an outer side of the plastic housing;
wherein one end of each of the conductive members is disposed on the inner frame, and the step is formed between the conductive members.

4. The semiconductor device according to claim 1 , wherein the plastic housing is made of a polyphenylene sulfide resin, and the sealing material is made of an epoxy resin.

5. The semiconductor device according to claim 1 , wherein an upper surface of the inner frame is roughened to be not lower than 1.0 μm in arithmetic average roughness Ra.

Assignees

• Fuji Electric Co Ltd

Inventors

• Katsuki Takashi

Classifications

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title

• H10W70/6875

  being on a metallic substrate, e.g. insulated metal substrates [IMS] · CPC title

• H10W76/18

  Insulating materials, e.g. resins, glasses or ceramics · CPC title

• H10W74/111

  the semiconductor body being completely enclosed · CPC title