Carrier with a test surface wettable with liquid solder and method for application thereof

US9498836B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9498836-B2
Application numberUS-201214233887-A
CountryUS
Kind codeB2
Filing dateJun 22, 2012
Priority dateJul 19, 2011
Publication dateNov 22, 2016
Grant dateNov 22, 2016

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  1. Title

    What the patent document calls the invention.

  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A carrier plate has test areas for the assessment of a selective soldering process. The carrier plate has different zones, which are provided with peripheral borders. The zones are not wettable with solder, while the peripheral borders are wettable. If a selective soldering head is brought up to the reference areas, then, as long as there is no deficiency in quality, the respective peripheral border must be just wetted with solder, whereby an assessment of the selective soldering process is possible. The test plate advantageously makes a simple optical evaluation possible, for example by visual inspection.

First claim

Opening claim text (preview).

The invention claimed is: 1. A carrier, comprising: a plurality of two-dimensional reference areas, each reference area having a central point or central axis and having at least one dimension that is less than or equal to a diameter of a required wetting area of a selective soldering process to be tested on the carrier; and wherein the plurality of two-dimensional reference areas includes a row of two-dimensional reference areas positioned such that the respective central points or central axes of the two-dimensional reference areas are aligned along a straight line along which a test head is passed; and a test area corresponding to each two-dimensional reference area in the row of two-dimensional reference areas; wherein the respective test area corresponding to each respective reference area comprises a pair of separate test area portions on opposing sides of the central point or central axis of the respective reference area and separated from each other by a distance, such that the pair of separate test area portions at least partially enclose the respective reference area; wherein the distance between the pair of separate test area portions increases progressively from one reference area to the next along the row of reference areas; and wherein each reference area is more difficult to wet with the liquid solder of the selective soldering process than the test area corresponding to that reference area. 2. The carrier as claimed in claim 1 , further comprising: a peripheral surround corresponding to each reference area that forms a second test area at a uniform distance from the partial peripheral border, wherein an area between the peripheral border and the peripheral surround is more difficult to wet with the liquid solder than the test area and the second test area. 3. The carrier as claimed in claim 1 , further comprising a central test area corresponding to each reference area that does not touch the at least partial peripheral border is provided in the middle of the reference area. 4. The carrier as claimed in claim 1 , wherein at least a portion of the reference areas are circular. 5. The carrier as claimed in claim 1 , wherein at least a portion of the reference areas are elongated, a width of the elongated reference area corresponding to a radius of the required wetting area and longitudinal sides of the elongated reference area being defined by the peripheral border. 6. The carrier as claimed in claim 5 , wherein multiple elongated reference areas are provided at right angles to one another. 7. The carrier as claimed in claim 1 , wherein at least one reference area includes multiple reference areas each provided for one of a plurality of wetting areas having different radii. 8. The carrier as claimed in claim 1 , wherein the carrier is configured as a carrier plate with an upper side and an underside, the at least one test area being provided on the underside of the carrier plate. 9. The carrier as claimed in claim 8 , wherein the carrier plate is provided with at least one through-hole that is closed on the upper side by an indicator for flux. 10. The carrier as claimed in claim 9 , wherein the carrier plate is provided with multiple through-holes having different hole widths. 11. The carrier as claimed in one of the claim 1 , further comprising a temperature indicator that is sensitive to temperatures occurring during the selective soldering process and has an irreversible indicator reaction. 12. The carrier as claimed in claim 1 , further comprising markings for positioning the carrier in an installation for the selective soldering process. 13. The carrier as claimed in claim 1 , further comprising a text field that is configured to be written in. 14. The carrier as claimed in claim 1 , wherein each pair of separate test area portions comprises a pair of linear test area segments. 15. The carrier as claimed in claim 1 , wherein the plurality of two-dimensional reference areas includes multiple rows of two-dimensional reference areas, wherein the reference areas of each row are positioned such that the respective central points or central axes of the two-dimensional reference areas are aligned along a respective straight line, and wherein the straight lines of the multiple rows extend in different directions. 16. A carrier, comprising: a row of two-dimensional reference areas, each reference area having a central point or central axis and at least one dimension that is less than or equal to a diameter of a required wetting area of a selective soldering process to be tested on the carrier, wherein the respective central points or central axes of the reference areas are aligned along a straight line; for each respective reference area in the row of reference areas: a first test area that is wettable with liquid solder, the first test area comprising a pair of separate test area portions on opposing sides of the central point or central axis of the respective reference area and separated from each other by a distance, such that the pair of separate test area portions at least partially enclose the respective reference area, the respective reference area being more difficult to wet with the liquid solder of the selective soldering process than the first test area; and a second test area configured as a peripheral surround, the second test area being spaced apart from and at least partially surrounding the first test area, wherein an area between the first and second test areas is more difficult to wet with the liquid solder than the first and second test areas; and wherein the distance between the pair of separate test area portions increases progressively from one reference area to the next along the row of reference areas.

Assignees

Inventors

Classifications

  • B23K1/20Primary

    Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating · CPC title

  • Solder dip coating, i.e. coating printed conductors, e.g. pads by dipping in molten solder or by wave soldering · CPC title

  • Auxiliary devices therefor · CPC title

  • Investigating surface tension of liquids · CPC title

  • Shaped configuration for melting [e.g., package, etc.] · CPC title

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Frequently asked questions

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What does patent US9498836B2 cover?
A carrier plate has test areas for the assessment of a selective soldering process. The carrier plate has different zones, which are provided with peripheral borders. The zones are not wettable with solder, while the peripheral borders are wettable. If a selective soldering head is brought up to the reference areas, then, as long as there is no deficiency in quality, the respective peripheral b…
Who is the assignee on this patent?
Müller Bernd, Wittreich Ulrich, Siemens Ag
What technology area does this patent fall under?
Primary CPC classification B23K1/20. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).