Semiconductor device and manufacturing method thereof

US9496404B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9496404-B2
Application numberUS-201113034726-A
CountryUS
Kind codeB2
Filing dateFeb 25, 2011
Priority dateMar 5, 2010
Publication dateNov 15, 2016
Grant dateNov 15, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An object of the present invention to provide a highly reliable semiconductor device. Another object is to provide a manufacturing method of a highly reliable semiconductor device. Still another object is to provide a semiconductor device having low power consumption. Yet another object is to provide a manufacturing method of a semiconductor device having low power consumption. Furthermore, another object is to provide a semiconductor device which can be manufactured with high mass productivity. Another object is to provide a manufacturing method of a semiconductor device which can be manufactured with high mass productivity. An impurity remaining in an oxide semiconductor layer is removed so that the oxide semiconductor layer is purified to have an extremely high purity. Specifically, after adding a halogen element into the oxide semiconductor layer, heat treatment is performed to remove an impurity from the oxide semiconductor layer. The halogen element is preferably fluorine.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device comprising: a substrate containing a semiconductor material, the substrate including a channel formation region and an impurity region; a first gate insulating layer over the substrate; a first gate electrode over the substrate with the first gate insulating layer interposed therebetween; an insulating surface over the substrate; a source electrode and a drain electrode over the insulating surface; an oxide semiconductor layer having a halogen element over the insulating surface, the source electrode, and the drain electrode; a second gate insulating layer over the insulating surface, the source electrode, the drain electrode, and the oxide semiconductor layer; and a second gate electrode over the second gate insulating layer, wherein the oxide semiconductor layer is in contact with the source electrode and the drain electrode, wherein a top surface of the first gate electrode and a top surface of the insulating surface are on substantially a same plane, and wherein a concentration of the halogen element is higher than or equal to 10 15 atoms/cm 3 and lower than or equal to 10 18 atoms/cm 3 . 2. The semiconductor device according to claim 1 , wherein the semiconductor material comprises silicon. 3. The semiconductor device according to claim 1 , wherein fluorine is included as the halogen element. 4. The semiconductor device according to claim 1 , wherein the oxide semiconductor layer comprises indium, gallium and zinc. 5. The semiconductor device according to claim 1 , wherein the impurity region comprises phosphorus or arsenic. 6. The semiconductor device according to claim 1 , further comprising an electrode, wherein the oxide semiconductor layer and the second gate insulating layer are sandwiched between the electrode and one of the source electrode and the drain electrode. 7. The semiconductor device according to claim 6 , wherein the electrode overlaps with the first gate electrode.

Assignees

Inventors

Classifications

  • Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth · CPC title

  • Conductivity type · CPC title

  • using transformation of metal, e.g. oxidation or nitridation · CPC title

  • of Group III-V semiconductors, e.g. to render them semi-insulating · CPC title

  • being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

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Frequently asked questions

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What does patent US9496404B2 cover?
An object of the present invention to provide a highly reliable semiconductor device. Another object is to provide a manufacturing method of a highly reliable semiconductor device. Still another object is to provide a semiconductor device having low power consumption. Yet another object is to provide a manufacturing method of a semiconductor device having low power consumption. Furthermore, ano…
Who is the assignee on this patent?
Yamazaki Shunpei, Kishida Hideyuki, Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10P14/3426. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 15 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).