Method for manufacturing semiconductor device

US9496376B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9496376-B2
Application numberUS-201514854789-A
CountryUS
Kind codeB2
Filing dateSep 15, 2015
Priority dateSep 19, 2014
Publication dateNov 15, 2016
Grant dateNov 15, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

To provide a semiconductor device with improved reliability. To provide a semiconductor device with stable characteristics. To provide a transistor having a low off-state current. To provide a transistor having a high on-state current. To provide a novel semiconductor device, a novel electronic device, or the like. A method for manufacturing the semiconductor device includes the steps of forming a first semiconductor over a substrate; forming a second semiconductor over and in contact with the first semiconductor; forming a first layer over the second semiconductor; performing oxygen plasma treatment and then removing the first layer to expose at least part of a surface of the second semiconductor; forming a third semiconductor over and in contact with the second semiconductor; forming a first insulator over and in contact with the third semiconductor; and forming a first conductor over the first insulator.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a semiconductor device comprising the steps of: forming a first oxide semiconductor over a substrate; forming a second oxide semiconductor over and in contact with the first oxide semiconductor; forming a layer over the second oxide semiconductor; performing oxygen plasma treatment after forming the layer; removing the layer so as to expose at least part of the second oxide semiconductor after performing the oxygen plasma treatment; forming a third oxide semiconductor over and in contact with the second oxide semiconductor; forming an insulator over and in contact with the third oxide semiconductor; and forming a conductor over the insulator. 2. The method according to claim 1 , wherein the layer has a higher hydrogen-transmitting property than at least one of the first oxide semiconductor and the third oxide semiconductor. 3. The method according to claim 1 , wherein the layer includes an oxide containing at least one of boron, carbon, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, titanium, vanadium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, germanium, yttrium, zirconium, niobium, molybdenum, ruthenium, indium, tin, lanthanum, neodymium, hafnium, tantalum, and tungsten. 4. The method according to claim 1 , wherein the second oxide semiconductor includes indium, an element M, and zinc, and wherein the element M is at least one of aluminum, gallium, yttrium, tin, boron, silicon, titanium, iron, nickel, germanium, yttrium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, and tungsten. 5. A method for manufacturing an electronic device comprising: the method according to claim 1 , wherein the electronic device includes the semiconductor device, and wherein the electronic device includes at least one of a housing, a display portion, a microphone, a speaker, and an operation key. 6. A method for manufacturing a semiconductor device comprising the steps of: forming a first oxide semiconductor over a substrate; forming a second oxide semiconductor over and in contact with the first oxide semiconductor; forming a pair of conductors in contact with a top surface of the second oxide semiconductor; forming a layer in contact with a top surface of the pair of conductors and a top surface of the second oxide semiconductor; performing oxygen plasma treatment after forming the layer; removing the layer so as to expose at least part of the second oxide semiconductor after performing the oxygen plasma treatment; forming a third oxide semiconductor in contact with the top surface of the pair of conductors and the top surface of the second oxide semiconductor; forming an insulator over and in contact with the third oxide semiconductor; and forming a conductor over the insulator. 7. The method according to claim 6 , wherein the layer has a higher hydrogen-transmitting property than at least one of the first oxide semiconductor and the third oxide semiconductor. 8. The method according to claim 6 , wherein the layer includes an oxide containing at least one of boron, carbon, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, titanium, vanadium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, germanium, yttrium, zirconium, niobium, molybdenum, ruthenium, indium, tin, lanthanum, neodymium, hafnium, tantalum, and tungsten. 9. The method according to claim 6 , wherein the second oxide semiconductor includes indium, an element M, and zinc, and wherein the element M is at least one of aluminum, gallium, yttrium, tin, boron, silicon, titanium, iron, nickel, germanium, yttrium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, and tungsten. 10. A method for manufacturing an electronic device comprising: the method according to claim 6 , wherein the electronic device includes the semiconductor device, and wherein the electronic device includes at least one of a housing, a display portion, a microphone, a speaker, and an operation key. 11. A method for manufacturing a semiconductor device comprising the steps of: forming a first oxide semiconductor over a substrate; forming a second oxide semiconductor over and in contact with the first oxide semiconductor; forming a layer in contact with at least part of a top surface of the second oxide semiconductor; performing oxygen plasma treatment after forming the layer; removing the layer so as to expose at least part of the second oxide semiconductor after performing the oxygen plasma treatment; forming a pair of conductors in contact with at least part of the top surface of the second oxide semiconductor; forming a third oxide semiconductor in contact with a top surface of the pair of conductors and the top surface of the second oxide semiconductor; forming an insulator over and in contact with the third oxide semiconductor; and forming a conductor over the insulator. 12. The method according to claim 11 , wherein the layer has a higher hydrogen-transmitting property than at least one of the first oxide semiconductor and the third oxide semiconductor. 13. The method according to claim 11 , wherein the layer includes an oxide containing at least one of boron, carbon, fluorine, magnesium, aluminum, silicon, phosphorus, chlorine, argon, titanium, vanadium, chromium, manganese, cobalt, nickel, copper, zinc, gallium, germanium, yttrium, zirconium, niobium, molybdenum, ruthenium, indium, tin, lanthanum, neodymium, hafnium, tantalum, and tungsten. 14. The method according to claim 11 , wherein the second oxide semiconductor includes indium, an element M, and zinc, and wherein the element M is at least one of aluminum, gallium, yttrium, tin, boron, silicon, titanium, iron, nickel, germanium, yttrium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, and tungsten. 15. A method for manufacturing an electronic device comprising: the method according to claim 11 , wherein the electronic device includes the semiconductor device, and wherein the electronic device includes at least one of a housing, a display portion, a microphone, a speaker, and an operation key.

Assignees

Inventors

Classifications

  • the floating gate being an electrode shared by two or more components · CPC title

  • characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

  • of multiple TFTs · CPC title

  • characterised by the compositions or shapes of the interlayer dielectrics · CPC title

  • Interconnections, e.g. scanning lines · CPC title

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What does patent US9496376B2 cover?
To provide a semiconductor device with improved reliability. To provide a semiconductor device with stable characteristics. To provide a transistor having a low off-state current. To provide a transistor having a high on-state current. To provide a novel semiconductor device, a novel electronic device, or the like. A method for manufacturing the semiconductor device includes the steps of formin…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D86/60. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 15 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).