Systems and methods for improving the performance of a quantum processor by reducing errors

Patent metadata

Field	Value
Publication number	US-9495644-B2
Application number	US-201414340303-A
Country	US
Kind code	B2
Filing date	Jul 24, 2014
Priority date	Jul 24, 2013
Publication date	Nov 15, 2016
Grant date	Nov 15, 2016

Abstract

Techniques for improving the performance of a quantum processor are described. Some techniques employ improving the processor topology through design and fabrication, reducing intrinsic/control errors, reducing thermally-assisted errors and methods of encoding problems in the quantum processor for error correction.

First claim

The invention claimed is:

1. A hybrid computational system comprising:
at least one quantum processor comprising a plurality of qubits and a plurality of couplers;
a configuration subsystem communicatively coupled to configure the at least one quantum processor, the configuration subsystem including at least one digital processor, and at least one non-transitory computer-readable storage medium communicatively coupled to the at least one digital processor and that stores at least one of processor-executable instructions or data, where in use the at least one digital processor:
receives a problem Hamiltonian defined over at least two of the qubits, the problem Hamiltonian having a ground state that encodes a solution to a computational problem;
during a first iteration on the computational problem:
determines a plurality of change values for the problem Hamiltonian;
updates the problem Hamiltonian to a new problem Hamiltonian using the plurality of change values;
sends the new problem Hamiltonian to the at least one quantum processor;
receives a changed solution set from the at least one quantum processor; and
transforms the changed solution set to a solution set.

2. The hybrid computational system of claim 1 wherein, in use, the at least one digital processor further:
returns the solution set.

3. The hybrid computational of claim 1 wherein, in use, the at least one digital processor selects at random for each entry in the plurality of change values either a change value or a no-change value in order to determine the plurality of change values for the problem Hamiltonian.

4. The hybrid computational of claim 3 wherein the change value is negative, the no-change value is positive, the problem Hamiltonian includes a plurality of local bias terms, the problem Hamiltonian includes a plurality of coupling terms, and, where in use, the at least one digital processor further:
creates a plurality of new local bias terms from the product of the plurality of changes and the plurality of local bias terms; and
creates a plurality of new coupling terms where each new coupling term includes the product of:
a first entry in the plurality of changes,
a second entry in the plurality of changes, and
a first entry in the plurality of coupling terms that correspond to both the first entry in the plurality of changes and the second entry in plurality of changes.

5. The hybrid computational of claim 1 wherein, in use, the at least one quantum processor-performs quantum annealing or adiabatic quantum computing.

6. The hybrid computational of claim 1 wherein, in use, the at least one digital processor creates a plurality of new qubit values from the product of the plurality of changes and the changed solution set in order to transform the changed solution set to the solution set.

7. The hybrid computational of claim 1 wherein, in use, the at least one digital processor further receives an integer M.

8. The hybrid computational of claim 7 wherein, in use, the at least one digital processor further:
during an M th iteration on the computational problem:
determines an M th plurality of change values for the problem Hamiltonian;
updates the problem Hamiltonian to a new M th problem Hamiltonian using the M th plurality of change values;
sends the new M th problem Hamiltonian to the at least one quantum processor;
receives an M th changed solution set from the at least one quantum processor; and
transforms the M th changed solution set to an M th solution set.

9. The hybrid computational of claim 8 wherein, in use, the at least one processor further:
during the M th iteration on the computational problem:
records the M th plurality of change values; and
records the M th solution set.

10. A method to configure at least one quantum processor which comprises a plurality of qubits and a plurality of couplers, the method comprising:
a configuration subsystem communicatively coupled to configure the at least one quantum processor, the configuration subsystem including at least one digital processor, and at least one non-transitory computer-readable storage medium communicatively coupled to the at least one digital processor and that stores at least one of processor-executable instructions or data, where in use the at least one digital processor:
receiving, via at least one digital processor, a problem Hamiltonian defined over at least two of the qubits, the problem Hamiltonian having a ground state that encodes a solution to a computational problem;
during a first iteration on the computational problem:
determining, via at least one digital processor, a plurality of change values for the problem Hamiltonian;
updating, via at least one digital processor, the problem Hamiltonian to a new problem Hamiltonian using the plurality of change values;
sending the new problem Hamiltonian to the at least one quantum processor;
receiving, via at least one digital processor, a changed solution set from the at least one quantum processor; and
transforming, via at least one digital processor, the changed solution set to a solution set.

11. The method of claim 10 , further comprising:
returning the solution set.

12. The method of claim 10 wherein determining the plurality of change values for the problem Hamiltonian includes selecting at random for each entry in the plurality of change values either a change value or a no-change value.

13. The method of claim 12 wherein the change value is negative, the no-change value is positive, the problem Hamiltonian includes a plurality of local bias terms, the problem Hamiltonian includes a plurality of coupling terms, and, further comprising:
creating a plurality of new local bias terms from the product of the plurality of changes and the plurality of local bias terms; and
creating a plurality of new coupling terms where each new coupling term includes the product of:
a first entry in the plurality of changes,
a second entry in the plurality of changes, and
a first entry in the plurality of coupling terms that correspond to both the first entry in the plurality of changes and the second entry in plurality of changes.

14. The method of claim 10 wherein transforming the changed solution set to the solution set includes creating a plurality of new qubit values from the product of the plurality of changes and the changed solution set.

15. The method of claim 10 , further comprising:
receiving, via the at least one digital processor, an integer M.

16. The method of claim 15 , further comprising:
during an M th iteration on the computational problem:
determining, via the at least one digital processor, an M th plurality of change values for the problem Hamiltonian;
updating, via the at least one digital processor, the problem Hamiltonian to a new M th problem Hamiltonian using the M th plurality of change values;
sending the new M th problem Hamiltonian to the at least one quantum processor;
receiving an M th changed solution set from the at least one quantum processor; and
transforming the M th changed solution set to an M th solution set.

17. The method of claim 16 , further comprising:
during the M th iteration on the computational problem:
recording the M th plurality of change values; and
recording the M th solution set.

18. A non-transitory computer-readable storage medium containing processor-executable instructions, which when executed cause at least one processor to:
receive a problem Hamiltonian defined over a plurality of qubits wherein the prob

Assignees

• D Wave Systems Inc

Inventors

• Chudak Fabian Ariel
• Rich Christopher B
• Bunyk Paul I

Classifications

• B82Y10/00

  Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic · CPC title

• G06N99/002 Primary

  Physics · mapped topic

• G06N10/60 Primary

  Quantum algorithms, e.g. based on quantum optimisation, quantum Fourier or Hadamard transforms · CPC title