Solid-state imaging device, manufacturing method thereof, and electronic apparatus

Patent metadata

Field	Value
Publication number	US-9490293-B2
Application number	US-201615084738-A
Country	US
Kind code	B2
Filing date	Mar 30, 2016
Priority date	Feb 25, 2011
Publication date	Nov 8, 2016
Grant date	Nov 8, 2016

Abstract

A solid-state imaging device includes a plurality of photoelectric conversion portions each provided in a semiconductor substrate and receives incident light through a light sensing surface, and a pixel separation portion provided to electrically separate a plurality of pixels. At least a pinning layer and a light shielding layer are provided in an inner portion of a trench provided on a side portion of each of the photoelectric conversion portions in an incident surface side, the trench includes a first trench and a second trench formed to be wider than the first trench in a portion shallower than the first trench, the pinning layer is formed in an inner portion of the first trench to cover an inside surface of the second trench, and the light shielding layer is formed to bury an inner portion of the second trench at least via the pinning layer.

First claim

What is claimed is:

1. An imaging device, comprising:
a plurality of photoelectric conversion portions disposed in a semiconductor substrate; and
a trench having a lattice shape in a plan view, wherein at least part of the trench is disposed between adjacent photoelectric conversion portions of the plurality of photoelectric conversion portions, the at least part of the trench including:
a first portion including a pinning layer, and a second portion including the pinning layer and an insulating layer, wherein a diameter of the first portion is smaller than a diameter of the second portion and wherein the pinning layer buries an entire inner portion of the first portion.

2. The imaging device according to claim 1 , wherein the insulating layer covers an inside surface of the pinning layer.

3. The imaging device according to claim 2 , wherein a light-shielding portion is disposed corresponding to the trench.

4. The imaging device according to claim 3 , wherein the light-shielding portion is embedded in the trench.

5. The imaging device according to claim 1 , wherein the pinning layer includes a negative fixed charge.

6. The imaging device according to claim 1 , wherein the pinning layer is selected from the group consisting of hafnium oxide, zirconium dioxide, aluminum oxide, neodymium oxide, tantalum pentoxide, lanthanum oxide, praseodymium oxide, promethium oxide, samarium oxide, europium oxide, gadolinium oxide, terbium oxide, dysprosium oxide, holmium oxide, erbium oxide, thulium oxide, ytterbium oxide, lutetium oxide or yttrium oxide, and combinations thereof.

7. The imaging device according to claim 1 , wherein the pinning layer comprises hafnium oxide.

8. The imaging device according to claim 1 , further comprising:
a pixel including at least one of the photoelectric conversion portions and a pixel transistor, wherein the pixel transistor and a wiring layer are disposed at a first side of the semiconductor substrate, wherein the first portion is disposed closer to the first side of the semiconductor substrate than the second portion.

9. The imaging device according to claim 8 , wherein the pixel transistor includes at least a reset transistor, an amplification transistor, and a transfer transistor.

10. The imaging device according to claim 9 , wherein the pixel includes a floating diffusion that is coupled to each of the reset transistor and the amplification transistor.

11. The imaging device according to claim 10 , wherein a transfer line is coupled to a gate of the transfer transistor, and a reset line is electrically connected to a gate of the reset transistor.

12. The imaging device according to claim 11 , wherein the transfer line and the reset line are included in the wiring layer.

13. The imaging device according to claim 8 , wherein a color filter is disposed over a second side of the semiconductor substrate opposite to the first side of the semiconductor substrate.

14. The imaging device according to claim 13 , wherein a microlens is disposed above the color filter.

15. The imaging device according to claim 1 , wherein at least one of the photoelectric conversion portions includes a hole accumulation diode structure.

16. The imaging device according to claim 1 , wherein a thickness of the insulating layer is 5 μm or less.

17. The imaging device according to claim 1 , wherein the pinning layer comprises hafnium oxide that extends outside of the trench to a surface of the semiconductor substrate.

18. An electronic apparatus, comprising: an imaging device, comprising:
a plurality of photoelectric conversion portions disposed in a semiconductor substrate; and
a trench having a lattice shape in a plan view, wherein at least part of the trench is disposed between adjacent photoelectric conversion portions of the plurality of photoelectric conversion portions, the at least part of the trench including:
a first portion including a pinning layer and an insulating layer, and
a second portion including the insulating layer, wherein a diameter of the first portion is smaller than a diameter of the second portion and wherein the pinning layer buries an entire inner portion of the first portion.

Assignees

• Sony Corp

Inventors

• Enomoto Takayuki

Classifications

• H04N25/76

  Addressed sensors, e.g. MOS or CMOS sensors · CPC title

• H04N25/78

  Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

• H01L27/14621

  Electricity · mapped topic

• H01L27/14627

  Electricity · mapped topic

• H01L27/14636

  Electricity · mapped topic