SiC semiconductor device
US-12080760-B2 · Sep 3, 2024 · US
US9490250B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9490250-B2 |
| Application number | US-201514606374-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 27, 2015 |
| Priority date | Mar 26, 2012 |
| Publication date | Nov 8, 2016 |
| Grant date | Nov 8, 2016 |
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A half-bridge circuit includes a low-side transistor and a high-side transistor each having a load path and a control terminal. The half-bridge circuit further includes a high-side drive circuit having a level shifter with a level shifter transistor. The low-side transistor and the level shifter transistor are integrated in a common semiconductor body.
Opening claim text (preview).
What is claimed is: 1. A half-bridge circuit, comprising: a low-side transistor and a high-side transistor each comprising a load path and a control terminal, a high-side drive circuit comprising a level shifter with a level shifter transistor, wherein the low-side transistor and the level shifter transistor are integrated in a common semiconductor body; and an edge termination comprising a field electrode arranged above the first surface of the semiconductor body, the edge termination defining a ring; wherein the level-shifter transistor is implemented as a MOSFET, comprising: a further source region, a further drift region and a further channel region arranged between the further source region and the further drift region; and a further gate electrode arranged adjacent to the further channel region and dielectrically insulated from the further channel region by a further gate dielectric wherein the MOSFET is a lateral MOSFET in which the source region and the drain region are distant in a lateral direction of the semiconductor body; wherein one of the source and drain regions of the lateral MOSFET is arranged inside the ring as defined by the edge termination, and wherein the other one of the source region and the drain region is arranged outside the ring as defined by the edge termination. 2. The half-bridge circuit of claim 1 , further comprising a diode integrated in the common semiconductor body. 3. The half-bridge circuit of claim 1 , wherein the low-side transistor comprises a source region, a drain region, a body region and a drift region arranged in the semiconductor body, a gate electrode arranged adjacent to the body region and dielectrically insulated from the body region by a gate dielectric, and wherein the level-shifter transistor is arranged within a well-like dielectric structure in the semiconductor body and comprising a further drift region. 4. The half-bridge circuit of claim 2 , wherein the diode is arranged within a well-like dielectric structure in the common semiconductor body. 5. The half-bridge circuit of claim 3 , further comprising a drift control region having a drain-sided end, and wherein a rectifier element is connected between the drain region and the drain-sided end of the drift control region. 6. The half-bridge circuit of claim 1 , wherein the low-side transistor is implemented as a vertical power transistor, wherein at least the source region of the power transistor is arranged inside the ring. 7. The half-bridge circuit of claim 3 , wherein the low-side transistor further comprises a drift control region arranged adjacent to the drift region and dielectrically insulated from the drift region by a drift control region dielectric. 8. The half-bridge circuit of claim 6 , wherein the further drift region vertically extends to the first surface adjacent the edge termination, and wherein the further drift region laterally extends from inside the ring to outside the ring.
comprising multiple field plate segments · CPC title
adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions · CPC title
having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions · CPC title
having trench gate electrodes · CPC title
Lateral IGFETs having no inversion channels, e.g. buried channel lateral IGFETs, normally-on lateral IGFETs or depletion-mode lateral IGFETs · CPC title
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