Method for manufacturing semiconductor device

Patent metadata

Field	Value
Publication number	US-9490140-B2
Application number	US-201514833311-A
Country	US
Kind code	B2
Filing date	Aug 24, 2015
Priority date	Aug 26, 2014
Publication date	Nov 8, 2016
Grant date	Nov 8, 2016

Abstract

There are provided methods for manufacturing a semiconductor device including providing a substrate including a metal layer including an oxidized surface layer in a heat treatment chamber, generating hydrogen radicals within the heat treatment chamber and reducing the oxidized surface layer of the metal layer using the hydrogen radicals.

First claim

What is claimed is:

1. A method for manufacturing a semiconductor device, the method comprising:
providing a substrate including a metal layer comprising an oxidized surface layer and an oxide layer in a heat treatment chamber, the metal layer and the oxide layer being sequentially stacked on the substrate;
generating hydrogen radicals within the heat treatment chamber; and
reducing the oxidized surface layer of the metal layer that underlies the oxide layer using the hydrogen radicals.

2. The method of claim 1 , wherein generating the hydrogen radicals comprises supplying gaseous hydrogen and gaseous oxygen to the heat treatment chamber.

3. The method of claim 2 , wherein the gaseous hydrogen and the gaseous oxygen are supplied in a flow ratio of about 2:3.

4. The method of claim 1 , wherein a temperature of an interior of the heat treatment chamber ranges from about 400° C. to about 700° C., and
wherein a pressure of the interior of the heat treatment chamber ranges from about 1 torr to about 20 torr.

5. The method of claim 1 , wherein the metal layer includes tungsten.

6. A method for manufacturing a semiconductor device, the method comprising:
forming gate structures, each of which includes at least one gate electrode comprising an oxidized surface layer, on a substrate;
forming an oxide film on the gate structures; and
heat treating the gate structures,
wherein heat treating the gate structures comprises:
providing the substrate including the gate electrodes each comprising the oxidized surface layer in a heat treatment chamber;
generating hydrogen radicals within the heat treatment chamber; and
reducing the oxidized surface layers of the gate electrodes that underlie the oxide film using the hydrogen radicals.

7. The method of claim 6 , wherein each of the gate structures further includes a tunneling dielectric layer, an electric charge storage layer, and a blocking dielectric layer sequentially stacked on the substrate, and each of the gate electrodes includes a metal layer.

8. The method of claim 7 , wherein the oxidized surface layers of the gate electrodes include metal oxide, and
wherein reducing the oxidized surface layers of the gate electrodes comprises reducing the metal oxide to metal.

9. The method of claim 6 , wherein generating the hydrogen radicals comprises supplying gaseous hydrogen and gaseous oxygen in a flow ratio of about 2:3 to an interior of the heat treatment chamber.

10. The method of claim 6 , wherein a temperature of an interior of the heat treatment chamber ranges from about 400° C. to about 700° C.

11. The method of claim 6 , wherein a pressure in an interior of the heat treatment chamber ranges from about 1 torr to about 20 torr.

12. A method for manufacturing a semiconductor device, the method comprising:
forming gate structures, each including a plurality of gate electrodes, a plurality of interlayer insulating layers alternately stacked with the plurality of gate electrodes, channels penetrating through the plurality of gate electrodes and the plurality of interlayer insulating layers, and gate dielectric layers disposed between the channels and the gate electrodes, on a substrate;
forming an oxide film to cover the gate structures; and
heat-treating the gate structures,
wherein heat-treating the gate structures comprises:
providing the substrate including the gate electrodes, each of which comprises an oxidized surface layer in a heat treatment chamber;
generating hydrogen radicals within the heat treatment chamber; and
reducing the oxidized surface layers of the gate electrodes using the hydrogen radicals.

13. The method of claim 12 , wherein reducing the oxidized surface layers of the gate electrodes comprises reducing a metal oxide to a metal.

14. The method of claim 13 , wherein the metal oxide includes tungsten oxide and the metal includes tungsten.

15. The method of claim 12 , wherein generating hydrogen radicals comprises supplying gaseous hydrogen and gaseous oxygen in a flow ratio of about 2:3 to an interior of the heat treatment chamber.

16. The method of claim 12 , wherein a temperature of an interior of the heat treatment chamber ranges from about 400° C. to about 700° C.

17. The method of claim 12 , wherein a pressure in an interior of the heat treatment chamber ranges from about 1 torr to about 20 torr.

18. The method of claim 12 , wherein the gate dielectric layers each comprise a tunneling dielectric layer, an electric charge storage layer, and a blocking dielectric layer which are sequentially disposed.

19. The method of claim 1 , wherein the oxide layer is free of metal.

20. The method of claim 6 , wherein each of the gate electrodes includes a metal layer, and the oxide film is free of metal.

Assignees

• Go Hyun Yong
• Lee Eun Young
• Jee Jung Geun
• Choi Eun Yeoung
• Kim Jin Gyun
• Lim Hun Hyeong
• Samsung Electronics Co Ltd

Inventors

• Go Hyun Yong
• Lee Eun Young
• Jee Jung Geun
• Choi Eun Yeoung
• Kim Jin Gyun
• Lim Hun Hyeong

Classifications

• H10P95/00 Primary

  Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

• H10D64/665

  the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum (having lateral variation H10D64/671) · CPC title

• H10D30/63

  Vertical IGFETs (H10D30/66 {, H10D30/6728, H10D30/689, H10D30/693} take precedence) · CPC title

• H10B43/27

  the channels comprising vertical portions, e.g. U-shaped channels · CPC title

• H10B41/27

  the channels comprising vertical portions, e.g. U-shaped channels · CPC title