Circuit for calculating weight adjustments of an artificial neural network, and a module implementing a long short-term artificial neural network
US-12056602-B2 · Aug 6, 2024 · US
Non-volatile memory based synchronous logic
US9490010B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9490010-B2 |
| Application number | US-201314780381-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 27, 2013 |
| Priority date | Mar 27, 2013 |
| Publication date | Nov 8, 2016 |
| Grant date | Nov 8, 2016 |
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- Title
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Abstract
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A method for setting resistance states of a first and a second resistive memory element (RME) is disclosed. The method may include coupling, via a common node, a first RME to a second RME. The method may include setting the first RME to either a high voltage resistance state or a low voltage resistance state. The method may include setting the second RME to a different state relative to the state of the first RME, wherein setting the second RME is substantially simultaneous with setting the first RME.
First claim
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What is claimed is: 1. A logic circuit, comprising: a first resistive memory element (RME) comprising a common node and a non-common node; a second RME coupled via the common node to the first RME further comprising a non-common node; and a control logic to simultaneously set the first RME to either a high voltage resistance state or a low voltage resistance state, and set the second RME to a different state relative to the state of the first RME; wherein the control logic i…
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Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
- G11C13/0069Primary
Physics · mapped topic
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- What does patent US9490010B2 cover?
- A method for setting resistance states of a first and a second resistive memory element (RME) is disclosed. The method may include coupling, via a common node, a first RME to a second RME. The method may include setting the first RME to either a high voltage resistance state or a low voltage resistance state. The method may include setting the second RME to a different state relative to the sta…
- Who is the assignee on this patent?
- Hewlett Packard Development Co Lp, Hewlett Packard Entpr Dev Lp
- What technology area does this patent fall under?
- Primary CPC classification G11C13/0069. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Nov 08 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).