Method for driving semiconductor device

US9479145B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9479145-B2
Application numberUS-201514636529-A
CountryUS
Kind codeB2
Filing dateMar 3, 2015
Priority dateMar 7, 2014
Publication dateOct 25, 2016
Grant dateOct 25, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A novel PLL is provided. An oscillator circuit includes first to n-th inverters, and first and second circuits. A first terminal of each of the first and second circuits is electrically connected to an output terminal of the i-th inverter. A second terminal of each of the first and second circuits is electrically connected to an input terminal of the (i+1)-th inverter. The first circuit has functions of storing first data, switching between electrically disconnecting the first terminal and the second terminal from each other and setting a resistance between the first terminal and the second terminal to a value based on the first data. The second circuit has functions of storing second data, switching between electrically disconnecting the first terminal and the second terminal from each other and setting a resistance between the first terminal and the second terminal to a value based on the second data.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for driving a semiconductor device comprising an oscillator circuit, the oscillator circuit comprising first to n-th inverters (n is an odd number greater than or equal to 3), a first circuit, and a second circuit, wherein a first terminal of the first circuit is electrically connected to an output terminal of the i-th inverter (i is a number from 1 to (n−1)), wherein a second terminal of the first circuit is electrically connected to an input terminal of the (i+1)-th inverter, wherein a first terminal of the second circuit is electrically connected to the output terminal of the i-th inverter, and wherein a second terminal of the second circuit is electrically connected to the input terminal of the (i+1)-th inverter, the method comprising the steps of: setting an oscillation frequency of the oscillator circuit to a first value by storing first data in the first circuit; setting the oscillation frequency of the oscillator circuit to a second value by storing second data in the second circuit; setting the oscillation frequency of the oscillator circuit to a value substantially equal to the first value by storing third data in the first circuit; and setting the oscillation frequency of the oscillator circuit to a value substantially equal to the second value by storing fourth data in the second circuit, wherein the third data has a value greater than a value of the first data, and wherein the fourth data has a value greater than a value of the second data. 2. The method for driving a semiconductor device according to claim 1 , wherein the first data, the second data, the third data, and the fourth data are analog potentials. 3. The method for driving a semiconductor device according to claim 1 , wherein the first circuit includes a first transistor and a first capacitor, wherein the second circuit includes a second transistor and a second capacitor, wherein the first transistor includes an oxide semiconductor in a channel formation region, wherein the second transistor includes an oxide semiconductor in a channel formation region, wherein the first data or the third data is input to the first capacitor through the first transistor, and wherein the second data or the fourth data is input to the second capacitor through the second transistor. 4. A semiconductor device comprising an oscillator circuit, the oscillator circuit comprising first to n-th inverters (n is an odd number greater than or equal to 3), a first circuit, and a second circuit, wherein a first terminal of the first circuit is electrically connected to an output terminal of the i-th inverter (i is a number from 1 to (n−1)), wherein a second terminal of the first circuit is electrically connected to an input terminal of the (i+1)-th inverter, wherein a first terminal of the second circuit is electrically connected to the output terminal of the i-th inverter, wherein a second terminal of the second circuit is electrically connected to the input terminal of the (i+1)-th inverter, wherein the first circuit has a function of storing first data, wherein the first circuit has a function of switching between electrically disconnecting the first terminal and the second terminal from each other and setting a resistance between the first terminal and the second terminal to a value based on the first data, wherein the second circuit has a function of storing second data, and wherein the second circuit has a function of switching between electrically disconnecting the first terminal and the second terminal from each other and setting a resistance between the first terminal and the second terminal to a value based on the second data. 5. The semiconductor device according to claim 4 , wherein the first data and the second data are analog potentials. 6. The semiconductor device according to claim 4 , wherein the first circuit includes a first transistor and a first capacitor, wherein the second circuit includes a second transistor and a second capacitor, wherein the first transistor includes an oxide semiconductor in a channel formation region, wherein the second transistor includes an oxide semiconductor in a channel formation region, wherein the first data is input to the first capacitor through the first transistor, and wherein the second data is input to the second capacitor through the second transistor.

Assignees

Inventors

Classifications

  • Digitally controlled · CPC title

  • with additional means for controlling the main nodes (H03K3/356104, H03K3/3562 take precedence) · CPC title

  • H03L7/0995Primary

    the oscillator comprising a ring oscillator · CPC title

  • the characteristic being duration, interval, position, frequency, or sequence · CPC title

  • Ring oscillators · CPC title

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What does patent US9479145B2 cover?
A novel PLL is provided. An oscillator circuit includes first to n-th inverters, and first and second circuits. A first terminal of each of the first and second circuits is electrically connected to an output terminal of the i-th inverter. A second terminal of each of the first and second circuits is electrically connected to an input terminal of the (i+1)-th inverter. The first circuit has fun…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H03K3/356086. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 25 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).