Current generation circuit

Patent metadata

Field	Value
Publication number	US-9466986-B2
Application number	US-201314044144-A
Country	US
Kind code	B2
Filing date	Oct 2, 2013
Priority date	Dec 3, 2012
Publication date	Oct 11, 2016
Grant date	Oct 11, 2016

Abstract

A current generating circuit that includes a first current source that generates a first current having a negative temperature coefficient a second current source that generates a second current having a positive temperature coefficient. A compensation circuit generates a common current using a first transistor that receives the first current and a second transistor formed in a mirroring structure, a third transistor that receives the second current, and a fourth transistor formed in a mirroring structure. In addition, the compensation circuit provides the common current as an output current using a transistor that is formed in at least a pair of mirroring structures.

First claim

What is claimed is:

1. A constant current generating circuit, comprising:
a first current source that generates a first current that has a negative temperature coefficient;
a second current source that generates a second current that has a positive temperature coefficient; and
a compensation circuit that generates a common current using a first transistor that receives the first current and a second transistor formed in a mirroring structure, a third transistor that receives the second current, and a fourth transistor formed in a mirroring structure, wherein the compensation circuit provides the common current as an output current using a transistor formed in at least a pair of mirroring structures,
wherein the common current is transferred to a transistor formed in a pair of mirroring structures to adjust a current amount thereof, wherein the output current is a source current, and
the transistor that is formed in the pair of mirroring structures is a metal-oxide-semiconductor field-effect transistor (MOSFET) of a P-type channel.

2. The current generating circuit of claim 1 , wherein a current amount of the first current and a current amount of the second current are adjusted between the first transistor and the second transistor and between the third transistor and the fourth transistor, respectively using a width/length (W/L) ratio of the transistor.

3. The current generating circuit of claim 1 , wherein the common current has a corresponding temperature coefficient within a predetermined error range in an intermediate value of the negative temperature coefficient and the positive temperature coefficient.

4. The current generating circuit of claim 1 , wherein the first transistor, the second transistor, the third transistor, and the fourth transistor are metal-oxide-semiconductor field-effect transistors (MOSFET) of an N-type channel.

5. The current generating circuit of claim 1 , wherein the transistor that is formed in the pair of minoring structures controls a current amount of a common current provided to the output current by adjusting a width/length (W/L) ratio of a transistor that has a gate connected to a gate of a transistor in which the common current is transferred based on a W/L ratio of a transistor.

6. A constant current generating circuit, comprising:
a first current source that generates a first current that has a negative temperature coefficient:
a second current source that generates a second current that has a positive temperature coefficient; and
a compensation circuit that generates a common current using a first transistor that receives the first current and a second transistor formed in a mirroring structure, a third transistor that receives the second current, and a fourth transistor formed in a mirroring structure, wherein the compensation circuit provides the common current as an output current using a transistor formed in at least a pair of mirroring structures,
wherein the common current is transferred to a transistor formed in two pairs of mirroring structures to adjust a current amount thereof, wherein the output current is a sink current.

7. The current generating circuit of claim 6 , wherein the transistor that is formed in the two pairs of mirroring structures includes:
a first pair of transistors to which the common current is transferred; and
a second pair of transistors that output the output current,
wherein the first pair of transistors are metal-oxide-semiconductor field-effect transistors (MOSFET) of a P-type channel, and the second pair of transistors are MOSFET transistors of an N-type channel.

8. The current generating circuit of claim 7 , wherein two transistors of a mirroring structure of the first pair of transistors and the second pair of transistors, respectively control a current amount that flows to the transistor by adjusting a width/length (W/L) ratio between two transistors of the mirroring structure.

9. The current generating circuit of claim 7 , wherein each of sources of the first pair of transistors are connected to a first power source that applies a predetermined level constant voltage, and each of sources of the second pair of transistors apply a constant voltage of a level lower than the level constant voltage or is connected to a second power source that has a ground potential.

Assignees

• Hyundai Motor Co Ltd

Inventors

• Kwon Soon-Myung
• Park Sang Gyu

Classifications

• G05F3/242 Primary

  with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage · CPC title

• H02J4/00 Primary

  Circuit arrangements for mains or distribution networks not specified as AC or DC; Circuit arrangements for mains or distribution networks combining AC and DC sections or sub-networks (arrangements using intermediate DC-AC-DC conversion H02J1/002; arrangements using high-voltage DC [HVDC] links H02J3/36) · CPC title

• Y10T307/549

  Cross-Sectional Technologies · mapped topic

• G05F3/26

  Current mirrors · CPC title

• G05F3/24 Primary

  wherein the transistors are of the field-effect type only (G05F3/205, G05F3/26, G05F3/30 take precedence) · CPC title