Interconnect structure for semiconductor devices

Patent metadata

Field	Value
Publication number	US-9460997-B2
Application number	US-201314145397-A
Country	US
Kind code	B2
Filing date	Dec 31, 2013
Priority date	Dec 31, 2013
Publication date	Oct 4, 2016
Grant date	Oct 4, 2016

Abstract

An interconnect and a method of forming an interconnect for a semiconductor device is provided. The interconnect is formed by treating an upper surface of a dielectric layer to create a high density layer. The treatment may include, for example, creating a high density monolayer using hexamethyldisilazane (HMDS), trimethylsilydiethylamine (TMSDEA) or trimethylsilylacetate (OTMSA). After treating, the dielectric layer may be patterned to create openings, which are subsequently filled with a conductive material. Excess conductive material may be removed using, for example, a chemical mechanical polishing.

First claim

What is claimed is:

1. A method of forming an integrated circuit structure, the method comprising:
providing a substrate having a dielectric layer formed thereon, the dielectric layer comprising a single dielectric material;
treating a surface of the dielectric layer to form a high density layer along the surface of the dielectric layer having a higher density than the dielectric layer;
after treating the surface, patterning the dielectric layer and the high density layer to form openings; and
forming a conductive material in the openings in the dielectric layer.

2. The method of claim 1 , wherein the treating the surface creates a high density monolayer over the dielectric layer.

3. The method of claim 1 , wherein the treating the surface comprises treating the surface of the dielectric layer with hexamethyldisilazane (HMDS).

4. The method of claim 3 , wherein the treating with HMDS comprises treating with an HMDS vapor.

5. The method of claim 1 , wherein the treating the surface comprises treating the surface of the dielectric layer with trimethylsilydiethylamine (TMSDEA).

6. The method of claim 5 , wherein the treating with TMSDEA comprises immersing the dielectric layer in a diluted TMSDEA solution.

7. The method of claim 1 , wherein the treating the surface comprises treating the surface of the dielectric layer with trimethylsilylacetate (OTMSA).

8. The method of claim 7 , wherein the treating with OTMSA comprises immersing the dielectric layer in a diluted OTMSA solution.

9. The method of claim 1 , further comprising removing excess conductive material from the surface of the dielectric layer using a chemical mechanical polishing (CMP) process.

10. A method of forming an integrated circuit structure, the method comprising:
providing a substrate having a dielectric layer formed thereon;
forming a high density monolayer over the dielectric layer, the high density monolayer having a higher density than the dielectric layer;
after forming the high density monolayer, patterning the dielectric layer and the high density monolayer to form one or more openings;
filling the openings with a conductive material, the conductive material extending over an upper surface of the high density monolayer; and
removing at least a portion of the conductive material extending over the upper surface of the high density monolayer.

11. The method of claim 10 , wherein the forming the high density monolayer comprises treating a surface of the dielectric layer with hexamethyldisilazane (HMDS).

12. The method of claim 10 , wherein the forming the high density monolayer comprises treating a surface of the dielectric layer with trimethylsilydiethylamine (TMSDEA).

13. The method of claim 10 , wherein the forming the high density monolayer comprises treating a surface of the dielectric layer with trimethylsilylacetate (OTMSA).

14. The method of claim 10 , wherein the high density monolayer comprises Si(CH 3 ) 3 .

15. A method of forming an integrated circuit structure, the method comprising:
providing a substrate having a dielectric layer formed thereon;
treating a surface of the dielectric layer to form a treated surface, the treating replacing terminating OH groups with a new chemical group;
after treating the surface of the dielectric layer, patterning the dielectric layer and the treated surface to form one or more openings; and
filling the openings with a conductive material, wherein the treated surface is exposed after the filling.

16. The method of claim 15 , wherein the filling comprises:
filling the openings with the conductive material such that the conductive material extends between the openings; and
performing chemical-mechanical polishing (CMP) to remove excess portions of the conductive material, the CMP exposing the treated surface.

17. The method of claim 15 , wherein the treating the surface comprises treating the surface of the dielectric layer with hexamethyldisilazane (HMDS).

18. The method of claim 17 , wherein treating the surface of the dielectric layer with HMDS comprises treating the surface of the dielectric layer with HMDS vapor.

19. The method of claim 15 , wherein the treating the surface comprises treating the surface of the dielectric layer with trimethylsilydiethylamine (TMSDEA).

20. The method of claim 15 , wherein the treating the surface comprises treating the surface of the dielectric layer with trimethylsilylacetate (OTMSA).

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Kuo Han-Hsin
• Ko Chung-Chi
• Yang Neng-Jye
• Huang Fu-Ming
• Tsai Chi-Ming
• Chen Liang-Guang

Classifications

• H10P95/064

  the removal being chemical etching · CPC title

• H10P95/00

  Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

• H10P52/403

  of conductive or resistive materials · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10P14/6546

  to change the surface groups of the insulating materials · CPC title