Cross point array MRAM having spin hall MTJ devices

Patent metadata

Field	Value
Publication number	US-9460768-B2
Application number	US-201313997050-A
Country	US
Kind code	B2
Filing date	Mar 14, 2013
Priority date	Mar 14, 2013
Publication date	Oct 4, 2016
Grant date	Oct 4, 2016

Abstract

Cross point array magnetoresistive random access memory (MRAM) implementing spin hall magnetic tunnel junction (MTJ)-based devices and methods of operation of such arrays are described. For example, a bit cell for a non-volatile memory includes a magnetic tunnel junction (MTJ) stack disposed above a substrate and having a free magnetic layer disposed above a dielectric layer disposed above a fixed magnetic layer. The bit cell also includes a spin hall metal electrode disposed above the free magnetic layer of the MTJ stack.

First claim

What is claimed is:

1. A cross-point array giant spin hall effect magnetoresistive random access memory (GSHE-MRAM), comprising:
a plurality of bit cells, each bit cell comprising a spin hall metal electrode coupled with a magnetic tunnel junction (MTJ) stack disposed above a substrate, and a second electrode disposed below and coupled with the MTJ stack, wherein the spin hall metal electrode of each bit cell comprises a metal selected from the group consisting of (β-Tantalum (β-Ta), β-Tungsten (β-W) and platinum (Pt), the metal disposed on a free magnetic layer of the MTJ stack of the bit cell, and wherein each bit cell does not include an associated select transistor;
a plurality of bit lines, each bit line coupled to one or more of the plurality of bit cells above and proximate a first end of each spin hall metal electrode of the one or more of the plurality of bit cells;
a unidirectional metal line disposed directly between the spin hall metal electrode of the one or more of the plurality of bit cells and one or more of the plurality of bit lines, wherein the unidirectional metal line is orthogonal to the one or more of the plurality of bit lines; and
a plurality of word lines, each word line below and coupled to one or more of the plurality of bit cells by the second electrode of each of the one or more of the plurality of bit cells.

2. The cross-point array GSHE-MRAM of claim 1 , wherein the spin hall electrode comprises a second, different, metal on either side of the free magnetic layer.

3. The cross-point array GSHE-MRAM of claim 1 , wherein the free magnetic layer is disposed on a dielectric layer of the MTJ stack of the bit cell, the dielectric layer is disposed on a fixed magnetic layer of the MTJ stack of the bit cell, and each bit cell further comprises:
an anti-ferromagnetic (AFM) layer disposed on the second electrode; and
a synthetic anti-ferromagnet (SAF) stack disposed on the AFM layer, wherein the MTJ stack is disposed on the SAF stack.

4. The cross-point array GSHE-MRAM of claim 3 , wherein the free magnetic layer comprises CoFeB, the dielectric layer comprises magnesium oxide (MgO), the fixed magnetic layer comprises CoFeB, the SAF stack comprises a layer of ruthenium (Ru) disposed on a layer of CoFe, the AFM layer comprises IrMn, and the second electrode comprises a Ru/Ta/Ru stack.

5. A cross-point array giant spin hall effect magnetoresistive random access memory (GSHE-MRAM), comprising:
a plurality of bit cells, each bit cell comprising a spin hall metal electrode coupled with a magnetic tunnel junction (MTJ) stack disposed above a substrate, and a second electrode disposed below and coupled with the MTJ stack, wherein the spin hall metal electrode is disposed on a free magnetic layer of the MTJ stack of the bit cell;
a plurality of bit lines, each bit line coupled to one or more of the plurality of bit cells above and proximate a first end of each spin hall metal electrode of the one or more of the plurality of bit cells;
a unidirectional metal line disposed directly between the spin hall metal electrode of the one or more of the plurality of bit cells and one or more of the plurality of bit lines, wherein the unidirectional metal line is orthogonal to the one or more of the plurality of bit lines; and
a plurality of word lines, each word line below and coupled to one or more of the plurality of bit cells by the second electrode of each of the one or more of the plurality of bit cells.

6. The cross-point array GSHE-MRAM of claim 5 , wherein the spin hall electrode comprises a second, different, metal on either side of the free magnetic layer.

7. The cross-point array GSHE-MRAM of claim 5 , wherein the free magnetic layer is disposed on a dielectric layer of the MTJ stack of the bit cell, the dielectric layer is disposed on a fixed magnetic layer of the MTJ stack of the bit cell, and each bit cell further comprises:
an anti-ferromagnetic (AFM) layer disposed on the second electrode; and
a synthetic anti-ferromagnet (SAF) stack disposed on the AFM layer, wherein the MTJ stack is disposed on the SAF stack.

8. The cross-point array GSHE-MRAM of claim 7 , wherein the free magnetic layer comprises CoFeB, the dielectric layer comprises magnesium oxide (MgO), the fixed magnetic layer comprises CoFeB, the SAF stack comprises a layer of ruthenium (Ru) disposed on a layer of CoFe, the AFM layer comprises IrMn, and the second electrode comprises a Ru/Ta/Ru stack.

Assignees

• Manipatruni Sasikanth
• Nikonov Dmitri E
• Young Ian A
• Intel Corp

Inventors

• Manipatruni Sasikanth
• Nikonov Dmitri E
• Young Ian A

Classifications

• G11C11/1659

  Cell access · CPC title

• G11C11/161

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

• G11C11/1675 Primary

  Writing or programming circuits or methods · CPC title

• G11C11/15

  using multiple magnetic layers (G11C11/155 takes precedence) · CPC title

• G11C11/18 Primary

  using Hall-effect devices · CPC title