Low latency first-in-first-out (FIFO) buffer

Patent metadata

Field	Value
Publication number	US-9459829-B2
Application number	US-201414331882-A
Country	US
Kind code	B2
Filing date	Jul 15, 2014
Priority date	Sep 23, 2010
Publication date	Oct 4, 2016
Grant date	Oct 4, 2016

Abstract

Systems and methods are provided for a first-in-first-out buffer. A buffer includes a first sub-buffer configured to store data received from a buffer input, and a second sub-buffer. The second sub-buffer is configured to store data received from either the buffer input or the first sub-buffer and to output data to a buffer output in a same order as that data is received at the buffer input. Buffer control logic is configured to selectively route data from the buffer input or the first sub-buffer to the second sub-buffer so that data received at the buffer input is available to be output from the second sub-buffer in a first-in-first-out manner.

First claim

What is claimed is:

1. A buffer comprising:
a buffer input;
a buffer output;
a first sub-buffer;
a second sub-buffer, the second sub-buffer having less storage capacity than the first sub-buffer, the second sub-buffer having a first sub-input and a second sub-input to receive data directly from the buffer input and the first sub-buffer, respectively, a latency of the second sub-buffer for transferring data being less than a latency of the first sub-buffer for transferring data;
a fill counter configured to store a buffer fill count that indicates a total amount of data stored across the first sub-buffer and the second sub-buffer, the fill counter configured to increment the buffer fill count each time a data value is transmitted directly from the buffer input to the first sub-buffer, to increment the buffer fill count each time a data value is transmitted directly from the buffer input to the second sub-buffer, and to decrement the buffer fill count each time a data value is output through the buffer output; and
a controller configured to access the buffer fill count and route data among the first sub-buffer and the second sub-buffer using the buffer fill count, the controller being configured to:
route data, received through the buffer input, to the first sub-buffer when the buffer fill count indicates that the second sub-buffer is full,
route the received data from the buffer input to the second sub-buffer, bypassing the first sub-buffer, when the buffer fill count indicates that the second sub-buffer is not full;
route data from the second sub-buffer to the buffer output when a data request is received by the controller; and
following the data request, route data from the first sub-buffer to the second sub-buffer when the buffer fill count indicates that the first sub-buffer contains data.

2. The buffer of claim 1 , wherein the first fill level threshold corresponds to data capacity of the second sub-buffer.

3. The buffer of claim 1 , further comprising a sampler configured to sample the received data before the received data is routed to the first sub-buffer or the second sub-buffer.

4. The buffer of claim 1 , wherein the first sub-buffer comprises a series of flip-flops.

5. The buffer of claim 1 , wherein the second sub-buffer comprises a sampler.

6. The buffer of claim 1 , wherein the controller is configured to output the received data through the buffer output in the same order that the received data was received through the buffer input.

7. A method for buffering data in a first in first out order, the method comprising:
receiving data through a buffer input;
storing a buffer fill count that indicates a total amount of data stored across a first sub-buffer and a second sub-buffer, the second sub-buffer having a first sub-input and a second sub-input to receive data directly from the buffer input and the first sub-buffer, respectively, the buffer fill count being incremented each time a data value is transmitted directly from the buffer input to the first sub-buffer, the buffer fill count being incremented each time a data value is transmitted directly from the buffer input to the second sub-buffer, and the buffer fill count being decremented each time a data value is output through a buffer output;
routing the received data to the first sub-buffer when the buffer fill count indicates that the second sub-buffer is full;
routing the received data to the second sub-buffer, and bypassing the first sub-buffer, when the buffer fill count indicates that the second sub-buffer is not full;
routing data from the second sub-buffer to the buffer output when a data request is received by the controller; and
following the data request, routing data from the first sub-buffer to the second sub-buffer when the buffer fill count indicates that the first sub-buffer contains data.

8. The method of claim 7 , wherein the first fill level threshold corresponds to data capacity of the second sub-buffer.

9. The method of claim 7 , further comprising:
sampling the received data before the received data is routed to the first sub-buffer or the second sub-buffer.

10. The method of claim 7 , wherein the first sub-buffer comprises a series of flip-flops.

11. The method of claim 7 , wherein the second sub-buffer comprises a sampler.

12. The method of claim 7 , wherein the routing steps are configured to output the received data through the buffer output in the same order that the received data was received through the buffer input.

Assignees

• Marvell Israel (M I S L ) Ltd
• Marvell Israel (M I S L) Ltd

Inventors

• Shumsky Evgeny
• Kushnir Jonathan

Classifications

• G06F2205/065

  With bypass possibility · CPC title

• G06F5/065

  Partitioned buffers, e.g. allowing multiple independent queues, bidirectional FIFO's · CPC title

• G06F5/14

  for overflow or underflow handling, e.g. full or empty flags · CPC title

• G06F2205/126

  Monitoring of intermediate fill level, i.e. with additional means for monitoring the fill level, e.g. half full flag, almost empty flag · CPC title

• G06F5/12 Primary

  Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations · CPC title