Fabricating 3D NAND memory having monolithic crystalline silicon vertical NAND channel

Patent metadata

Field	Value
Publication number	US-9443865-B2
Application number	US-201414575937-A
Country	US
Kind code	B2
Filing date	Dec 18, 2014
Priority date	Dec 18, 2014
Publication date	Sep 13, 2016
Grant date	Sep 13, 2016

Abstract

Disclosed herein are techniques for fabricating 3D NAND memory devices having a mono-crystalline silicon semiconductor vertical NAND channel. Memory holes are formed in horizontal layers of material above a substrate. A vertically-oriented NAND string is formed in each of the memory holes. Forming the vertically-oriented NAND string channel comprises growing monolithic crystalline silicon upwards in the memory hole from the substrate through all of the plurality of horizontal layers of material. Vapor phase epitaxial growth may be used grow the monolithic crystalline silicon upwards from the bottom of the vertically-oriented NAND channel. Alternatively, a nanowire of monolithic crystalline silicon is synthesized in the memory hole from the substrate at the bottom of the vertically-oriented NAND channel upwards to the top of the vertically-oriented NAND channel.

First claim

What is claimed is:

1. A method for fabricating a three-dimensional (3D) non-volatile storage device, the method comprising:
forming a plurality of horizontal layers of material above a substrate;
forming memory holes that extend vertically through the plurality of horizontal layers of material to the substrate;
forming a vertically-oriented NAND string in each of the memory holes, each vertically-oriented NAND string comprising a plurality of non-volatile storage elements and a vertically-oriented NAND string channel having a bottom at the substrate and a top at an uppermost of the plurality of horizontal layers of material, forming an individual one of the NAND strings in a given memory hole including:
forming material for the plurality of non-volatile storage elements for the NAND string in the given memory hole leaving a channel hole that extends vertically through the plurality of horizontal layers of material to the substrate, the non-volatile storage elements of the NAND string surround the channel hole; and
forming the vertically-oriented NAND string channel in the channel hole comprising growing monolithic crystalline silicon upwards from the substrate through all of the plurality of horizontal layers of material, comprising using neopentosilane as a precursor in vapor phase epitaxial growth to grow the monolithic crystalline silicon in the channel hole upwards from the bottom of the vertically-oriented NAND channel upwards to the top of the vertically-oriented NAND channel.

2. The method of claim 1 , wherein the channel hole has vertical sidewalls, and further comprising:
using a nitrogen gas flow to passivate silicon nucleation sites on the sidewalls of the channel hole prior to growing the monolithic crystalline silicon upwards from the substrate through all of the plurality of horizontal layers of material.

3. The method of claim 1 , wherein growing the monolithic crystalline silicon upwards from the substrate through all of the plurality of horizontal layers of material comprises:
forming a vertical NAND string channel having a solid monolithic crystalline silicon core for the entire vertical length of the vertical NAND string channel.

4. The method of claim 1 , further comprising:
forming word lines in a group of the plurality of horizontal layers of material, the word lines being associated with the vertically-oriented NAND strings in the memory holes.

5. A method for fabricating a three-dimensional (3D) non-volatile storage device, the method comprising:
forming a first plurality of horizontal layers of silicon oxide above a substrate;
forming a second plurality of horizontal layers of silicon nitride above the substrate, the second plurality of horizontal layers alternating with the first plurality of horizontal layers;
forming memory holes that extend vertically through all of the first and second plurality of horizontal layers to the substrate;
forming a vertically-oriented NAND string in each of the memory holes, each vertically-oriented NAND string comprising a plurality of non-volatile storage elements and a vertically-oriented NAND string channel, wherein forming the vertically-oriented NAND string channel comprises growing a nanowire of mono-crystalline silicon in each respective memory hole from the substrate upwards for the entire length of the NAND string channel; and
replacing the silicon nitride in the second plurality of horizontal layers with metal to form word lines that are associated with the NAND strings.

6. The method of claim 5 , wherein growing a nanowire of mono-crystalline silicon in each respective memory hole from the substrate upwards for the entire length of the NAND string channel comprises:
using vapor-liquid-solid (VLS) synthesis to grow the mono-crystalline silicon in the memory hole from the substrate upwards for the entire length of the NAND string channel.

7. The method of claim 6 , growing a nanowire of mono-crystalline silicon in each respective memory hole from the substrate upwards for the entire length of the NAND string channel comprises:
forming gold nano-clusters in the memory holes on the substrate;
introducing a reactant source of silicon into the memory holes after forming the gold nano-clusters; and
annealing at a temperature higher than the gold-silicon eutectic point after introducing the reactant source of silicon.

8. The method of claim 7 , wherein introducing the reactant source of silicon into the memory holes comprises:
using disilane (Si 2 H 6 ) as the reactant source.

9. The method of claim 5 , wherein the memory holes each have a bottom at the substrate and a top at an uppermost of the first and second plurality of horizontal layers, wherein growing a nanowire of mono-crystalline silicon in each respective memory hole from the substrate upwards for the entire length of the NAND string channel comprises:
growing a single nanowire of monolithic crystalline silicon from the substrate at the bottom of the memory hole to the top of the memory hole.

10. A method for fabricating a three-dimensional (3D) non-volatile storage device, the method comprising:
forming a first plurality of horizontal layers of sacrificial material above a substrate;
forming a second plurality of horizontal layers of insulating material alternating with the first plurality of horizontal layers of sacrificial material in a stack above the substrate; and
forming memory holes that extend vertically through the horizontal layers of insulating material and the horizontal layers of sacrificial material;
forming a vertically-oriented NAND string in each of the memory holes, each vertically-oriented NAND string comprising a plurality of non-volatile storage elements and a vertically-oriented NAND string channel, forming the NAND strings including:
forming material for the plurality of non-volatile storage elements in the memory holes leaving a channel hole that extends vertically from the substrate through the horizontal layers of insulating material and the horizontal layers of sacrificial material; and
forming the vertically-oriented NAND string channel in the channel hole comprising using vapor phase epitaxial growth to grow mono-crystalline silicon upwards from the substrate through all of the horizontal layers of insulating material and all of the horizontal layers of sacrificial material, using the vapor phase epitaxial growth comprises using neopentosilane as a precursor, the mono-crystalline silicon completely filling the channel hole;

removing the sacrificial material from the first plurality of horizontal layers of sacrificial material; and
depositing conductive material in place of the removed sacrificial material.

11. The method of claim 10 , wherein the channel hole has vertical sidewalls that extend from the substrate through the first plurality of horizontal sacrificial layers and the second plurality of horizontal insulating layers, and further comprising:
introducing nitrogen gas into the channel holes to passivate silicon dangling bonds on the vertical sidewalls of the channel hole prior to using vapor phase epitaxial growth to grow the mono-crystalline silicon.

12. The method of claim 10 , wherein using vapor phase epitaxial growth to grow the mono-crystalline silicon upwards from the substrate through all of the horizontal layers of insulating material and all of the horizontal layers of sacrificial material comprises:
growing the mono-crystalline silicon to a height of at least 4 micrometers.

13. A method for fabricating a three-dimensional (3D) non-volatile storage device, the method comprising:
forming a plurality of horizontal layers of material above a substrat

Assignees

• Sandisk Technologies Inc
• Sandisk Technologies Llc

Inventors

• Rabkin Peter
• Pachamuthu Jayavel
• Alsmeier Johann
• Higashitani Masaaki

Classifications

• H10P95/90

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/3462

  Nanowires · CPC title

• H10P14/3458

  Monocrystalline · CPC title