Run-time fabric reconfiguration

Patent metadata

Field	Value
Publication number	US-9436623-B2
Application number	US-201213623501-A
Country	US
Kind code	B2
Filing date	Sep 20, 2012
Priority date	Sep 20, 2012
Publication date	Sep 6, 2016
Grant date	Sep 6, 2016

Abstract

Methods, apparatus and systems for implementing run-time fabric reconfiguration are described herein. In accordance with one aspect, techniques are disclosed for implementing run-time fabric reconfiguration on a System on a Chip (SoC) via use of multiple endpoint fabric interfaces having routing logic that is dynamically reconfigured at run-time by a fabric control unit in response to system-state changes. The endpoint fabric interfaces may be coupled to or integrated in IP blocks that are coupled to a switch fabric, or may be implemented in the switch fabric itself. The run-time fabric reconfiguration techniques may be implemented to for various purposes and/or to address various events, such as node failures, security events, IP or design bugs, feature prototyping, and virtualization.

First claim

What is claimed is:

1. A System on a Chip (SoC), comprising:
a semiconductor chip, having integrated thereon,
a switch fabric;
a plurality of endpoint fabric interfaces, each coupled to the switch fabric or integrated in the switch fabric;
a plurality of Intellection Property (IP) blocks, each coupled to a respective endpoint fabric interface or having an endpoint fabric interface integrated therein; and
a fabric controller, operatively coupled to the switch fabric and communicatively coupled to the plurality of endpoint fabric interfaces,

wherein each endpoint fabric interface includes a routing unit configured to hold a routing table and routing rules, and wherein the fabric controller is configured to at least one of update the routing table or routing rules for one or more of the endpoint fabric interfaces in response to detection of a system-state change event.

2. The SoC of claim 1 , wherein an endpoint fabric interface further includes a classifier unit configured to parse packet data corresponding to a packet originating from an IP block associated with the endpoint fabric interface and output least one of a size, type, security level, or destination for the packet.

3. The SoC of claim 1 , wherein an endpoint fabric interface further includes a measurement unit configured to measure occurrences of events and/or packet characteristics corresponding to incoming and/or outgoing traffic passing through the endpoint fabric interface, and wherein the fabric controller is configured to reconfigure the fabric based on measurements made by the measurement unit.

4. The SoC of claim 3 , wherein the fabric controller is configured to collect measured data from a measurement unit of an endpoint fabric interface and update one or more of the routing table or routing rules for the endpoint fabric interface in view of the measured data.

5. The SoC of claim 4 , further comprising a security engine operatively coupled to the switch fabric,
wherein the update to one or more of the routing table or routing rules for the endpoint fabric interface causes a packet having certain characteristics to be re-routed to the security engine.

6. The SoC of claim 1 , wherein the plurality of endpoint fabric interfaces are communicatively coupled to the fabric controller via a sideband channel that is separate and apart from the fabric.

7. The SoC of claim 1 , wherein the plurality of endpoint fabric interfaces are integrated in the switch fabric and are communicatively coupled to the fabric controller via the switch fabric.

8. The SoC of claim 1 , further comprising:
a second fabric, coupled to the switch fabric via a fabric-to-fabric bridge;
at least one processor core, operatively coupled to the second fabric; and
an endpoint fabric interface, coupled between the fabric-to-fabric bridge and the switch fabric.

9. The SoC of claim 1 , further comprising:
a power management unit, operatively coupled to the switch fabric and configured to control a power state of at least one IP block,
wherein the fabric controller is further configured to,
receive information from the power management unit identifying an IP block is operating in a reduced power state; and
update the routing table and/or routing rules for at least one endpoint fabric interface such that an outbound packet originating from an IP block associated with the at least one endpoint fabric interface and having an original destination of the IP block in the reduced power state is routed to the fabric controller.

10. The SoC of claim 9 , wherein the fabric controller is further configured to:
send a request to the power management unit to power up the IP block in the reduced power state; and
forward the packet to the IP block.

11. The SoC of claim 1 , wherein the fabric comprises one of an Open Core Protocol (OCP) fabric, an Advanced Microcontroller Bus Architecture (AMBA)-based fabric, or a Basic Virtual Component Interface (BVCI) interconnect.

12. A computing device, comprising:
a main board, enclosed within a chassis;
an input/output (TO) device, mounted to the main board;
a System on a Chip (SoC), operatively coupled to the main board, comprising,
a semiconductor chip, having integrated thereon,
a switch fabric;
a plurality of endpoint fabric interfaces, communicatively coupled to the switch fabric;
a plurality of Intellectual Property (IP) blocks, each comprising a block of logic circuitry embedded in the semiconductor chip that is coupled to a respective endpoint fabric interface or having an endpoint fabric interface integrated therein; and
a fabric controller, operatively coupled to the switch fabric and communicatively coupled to the plurality of endpoint fabric interfaces,

wherein each endpoint fabric interface includes a routing unit having a routing table and routing rules, wherein the fabric controller is configured to update at least one of the routing table or routing rules for one or more of the endpoint fabric interfaces in response to detection of a system-state change event, and wherein one of the plurality of IP blocks comprises an IO interface configured to facilitate communication between the SoC and the IO device when the computing device is operating.

13. The computing device of claim 12 , further comprising an antenna, operatively coupled to or mounted within the chassis, wherein the SoC further includes a radio frequency transceiver that is operatively coupled to the antenna.

14. The computing device of claim 12 , wherein the SoC further comprises:
a power management unit, operatively coupled to the switch fabric and configured to control a power state of at least one IP block,
wherein the fabric controller is further configured to,
receive information from the power management unit identifying an IP block is operating in a reduced power state; and
update the routing table and/or routing rules for at least one endpoint fabric interface such that an outbound packet originating from an IP block associated with the at least one endpoint fabric interface and having an original destination of the IP block in the reduced power state is routed to the fabric controller.

15. The computing device of claim 12 , wherein the fabric controller is further configured to:
send a request to the power management unit to power up the IP block in the reduced power state; and
forward the packet to the IP block.

16. The computing device of claim 12 , wherein the SoC further comprises:
a second fabric, coupled to the switch fabric via a fabric-to-fabric bridge;
at least one processor core, operatively coupled to the second fabric; and
an endpoint fabric interface, coupled between the fabric-to-fabric bridge and the switch fabric.

Assignees

• Intel Corp

Inventors

• Wertheimer Aviad
• Greenspan Daniel

Classifications

• G06F13/14 Primary

  Handling requests for interconnection or transfer · CPC title

• G06F13/4022

  using switching circuits, e.g. switching matrix, connection or expansion network (G06F13/4009 takes precedence) · CPC title

• G06F12/0292 Primary

  using tables or multilevel address translation means (G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10) · CPC title

• G06F13/362 Primary

  with centralised access control · CPC title

• G06F2212/1032

  Reliability improvement, data loss prevention, degraded operation etc · CPC title