Method and system for display output stutter

US9152201B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9152201-B2
Application numberUS-201213618266-A
CountryUS
Kind codeB2
Filing dateSep 14, 2012
Priority dateOct 22, 2009
Publication dateOct 6, 2015
Grant dateOct 6, 2015

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Abstract

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Apparatus and methods for reducing power consumption of a data transfer interface in a computer system are disclosed. In one embodiment, a method for reducing power consumption of a data transfer interface between a first device and a second device, includes, identifying a free interval between a first data and a second data, disabling the data transfer interface during the free interval, enabling the data transfer interface at the end of the free interval, and transmitting the second data. The method may also include a step of notifying the second device that the data transfer interface is being temporarily disabled. Another embodiment, for example, includes the transfer of display data (or video frames) over an interface, such as, a DisplayPort interface, between a graphics controller device and a timing controller device in a computer system.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of reducing power consumption for transferring video frames of a video stream over a data transfer interface between a first device and a second device, the method comprising: determining, by the second device, whether (a) the video stream is completed or terminated or (b) the data transfer interface is disabled after a notification included in a video frame of the video stream; receiving, over the data transfer interface, the notification from th…

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What does patent US9152201B2 cover?
Apparatus and methods for reducing power consumption of a data transfer interface in a computer system are disclosed. In one embodiment, a method for reducing power consumption of a data transfer interface between a first device and a second device, includes, identifying a free interval between a first data and a second data, disabling the data transfer interface during the free interval, enabl…
Who is the assignee on this patent?
Carter Collis Quinn Troy, Ati Technologies Ulc
What technology area does this patent fall under?
Primary CPC classification G06F1/3203. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 06 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).