Validating the status of memory operations

US9436397B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9436397-B2
Application numberUS-201514596182-A
CountryUS
Kind codeB2
Filing dateJan 13, 2015
Priority dateSep 23, 2014
Publication dateSep 6, 2016
Grant dateSep 6, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The various implementations described herein include systems, methods and/or devices used to validate the status of memory operations in a storage device. In one aspect, the method includes sending a first set of command instructions to a first device of the plurality of non-volatile memory devices, including: a memory operation command; a first status polling command to determine a status of the first device, and a second status polling command to determine a status of the first device. The first status polling command is sent after the memory operation command is sent, and the second status polling command is sent after receiving a response to the first status polling command that meets predefined completion criteria. The method further includes forgoing sending any subsequent set of command instructions to the first device until a response to the second status polling command that meets the predefined completion criteria is received.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of operating a storage device including a plurality of non-volatile memory devices, the method comprising: at the storage device, sending a first set of command instructions to a first device of the plurality of non-volatile memory devices, the first set of command instructions including: a memory operation command which, when executed, operates on the first device, a first status polling command to determine a status of the first device, and a second status polling command to determine a status of the first device; wherein the first status polling command is sent to the first device after the memory operation command is sent to the first device, and the second status polling command is sent to the first device after receiving a response to the first status polling command that meets predefined completion criteria; and forgoing sending any subsequent set of command instructions to the first device until a response to the second status polling command that meets the predefined completion criteria is received. 2. The method of claim 1 , further comprising performing a remedial action in accordance with a determination that the response to the second status polling command includes a predefined error indication. 3. The method of claim 1 , further comprising performing a remedial action in accordance with a determination that the response to the second status polling command includes a predefined error indication, without regard to whether the response to the first status polling command includes the predefined error indication. 4. The method of claim 2 , wherein the remedial action comprises changing an operational status of a block of non-volatile memory in the first device. 5. The method of claim 1 , wherein: sending the memory operation command to the first device comprises sending a set of one or more memory operation commands to the first device; and the response to the first status polling command includes a first operation completion status with respect to the set of one or more memory operation commands and a first failure status with respect to the set of one or more memory operation commands. 6. The method of claim 5 , wherein the response to the second status polling command includes a second operation completion status with respect to the set of one or more memory operation commands and a second failure status with respect to the set of one or more memory operation commands; and wherein the response to the second status polling command meets the predefined completion criteria when (A) the second operation completion status indicates that execution of the set of one or more memory operation commands is completed, or (B) the second failure status indicates that execution of at least one of the one or more memory operation commands failed. 7. The method of claim 1 , wherein sending the first status polling command to the first device comprises iteratively sending the first status polling command to the first device until the response to the first status polling command meets the predefined completion criteria. 8. The method of claim 1 , wherein sending the second status polling command to the first device comprises iteratively sending the second status polling command to the first device until the response to the second status polling command meets the predefined completion criteria. 9. The method of claim 1 , wherein sending the memory operation command to the first device comprises sending a set of one or more memory operation commands to the first device; and the method further includes: in accordance with a determination that the received response to the first status polling command includes a first failure status indicating that at least one memory operation command of the set of one or more memory operation commands failed; and in accordance with a determination that the received response to the second status polling command includes a second failure status indicating that none of the set of one or more memory operation commands failed; determining that the received response to the first operation status command was erroneous. 10. The method of claim 1 , wherein sending the memory operation command to the first device comprises sending a set of one or more memory operation commands to the first device; the method further includes: in accordance with a determination that the received response to the first status polling command includes a first failure status indicating that none of the set of one or more memory operation commands failed; and in accordance with a determination that the received response to the second status polling command includes a second failure status indicating that at least one memory operation command of the set of one or more memory operation commands failed; determining that the received response to the first operation status command was erroneous. 11. A storage device, comprising: a plurality of non-volatile memory devices; and a controller coupled to the plurality of non-volatile memory devices, the controller configured to: send a first set of command instructions to a first device of the plurality of non-volatile memory devices, the first set of command instructions including: a memory operation command which, when executed, operates on the first device, a first status polling command to determine a status of the first device, and a second status polling command to determine a status of the first device; wherein the first status polling command is sent to the first device after the memory operation command is sent to the first device, and the second status polling command is sent to the first device after receiving a response to the first status polling command that meets predefined completion criteria; and forgo sending any subsequent set of command instructions to the first device until a response to the second status polling command that meets the predefined completion criteria is received. 12. The storage device of claim 11 , wherein the controller includes one or more modules, including a status polling module and status processing module, configured to control the sending and processing of the first status polling command and the second first status polling command. 13. The storage device of claim 11 , the controller further configured to perform a remedial action in accordance with a determination that the response to the second status polling command includes a predefined error indication, without regard to whether the response to the first status polling command includes the predefined error indication. 14. The storage device of claim 12 , wherein the remedial action comprises changing an operational status of a block of non-volatile memory in the first device. 15. The storage device of claim 11 , wherein: sending the memory operation command to the first device comprises sending a set of one or more memory operation commands to the first device; and the response to the first status polling command includes a first operation completion status with respect to the set of one or more memory operation commands and a first failure status with respect to the set of one or more memory operation commands. 16. The storage device of claim 11 , wherein sending the first status polling command to the first device comprises iteratively sending the first status polling command to the first device until the response to the first status polling command meets the predefined completion criteria. 17. The storage device of claim 11 , wherein sending the memory operation command

Assignees

Inventors

Classifications

  • G06F3/0619Primary

    in relation to data integrity, e.g. data losses, bit errors · CPC title

  • Improving I/O performance · CPC title

  • Command handling arrangements, e.g. command buffers, queues, command scheduling · CPC title

  • Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

  • Monitoring storage devices or systems · CPC title

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Frequently asked questions

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What does patent US9436397B2 cover?
The various implementations described herein include systems, methods and/or devices used to validate the status of memory operations in a storage device. In one aspect, the method includes sending a first set of command instructions to a first device of the plurality of non-volatile memory devices, including: a memory operation command; a first status polling command to determine a status of t…
Who is the assignee on this patent?
Sandisk Entpr Ip Llc, Sandisk Technologies Llc
What technology area does this patent fall under?
Primary CPC classification G06F3/0619. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 06 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).