Manufacturing method of semiconductor device, and semiconductor device

US9428342B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9428342-B2
Application numberUS-201514816847-A
CountryUS
Kind codeB2
Filing dateAug 3, 2015
Priority dateMay 10, 2013
Publication dateAug 30, 2016
Grant dateAug 30, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided is a semiconductor device that suppresses the occurrence of defects due to photocorrosion. A method for manufacturing the semiconductor device includes the steps of: forming an insulating layer with a concave portion over a substrate; forming a conductive film over the insulating film and the inside of the concave portion; polishing and removing the conductive film positioned over the insulating layer; and cleaning the insulating layer in a light-shielded state. Between the step of polishing and the step of cleaning, or after the step of cleaning, the substrate SUB is moved by detecting the presence or absence of the substrate SUB in the light-shielded state using an infrared sensor.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a semiconductor device by using a semiconductor manufacturing apparatus, comprising steps of: (a) forming a first wiring over a semiconductor substrate; (b) forming an insulating film over the first wiring; (c) forming, in the insulating film, a hole connected to the first wiring and a trench connected to the hole; (d) forming a conductive film over the insulating film in order to fill in the hole and the trench; (e) polish…

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What does patent US9428342B2 cover?
Provided is a semiconductor device that suppresses the occurrence of defects due to photocorrosion. A method for manufacturing the semiconductor device includes the steps of: forming an insulating layer with a concave portion over a substrate; forming a conductive film over the insulating film and the inside of the concave portion; polishing and removing the conductive film positioned over the …
Who is the assignee on this patent?
Renesas Electronics Corp
What technology area does this patent fall under?
Primary CPC classification H10P72/0412. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 30 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).