Memory cells, methods of forming memory cells, and methods of programming memory cells

Patent metadata

Field	Value
Publication number	US-9424920-B2
Application number	US-201514982810-A
Country	US
Kind code	B2
Filing date	Dec 29, 2015
Priority date	Feb 24, 2011
Publication date	Aug 23, 2016
Grant date	Aug 23, 2016

Abstract

Some embodiments include methods in which a memory cell is formed to have programmable material between first and second access lines, with the programmable material having two compositionally different regions. A concentration of ions and/or ion-vacancies may be altered in at least one of the regions to change a memory state of the memory cell and to simultaneously form a pn diode. Some embodiments include memory cells having programmable material with two compositionally different regions, and having ions and/or ion-vacancies diffusible into at least one of the regions. The memory cell has a memory state in which the first and second regions are of opposite conductivity type relative to one another.

First claim

We claim:

1. A method of forming and programming a memory cell, comprising:
forming a first region of a programmable material over and directly against a first access line;
forming a second region of the programmable material over the first region; the first and second regions being compositionally different from one another;
forming a second access line over and directly against the second region;
wherein the programmable material has two distinguishable and interchangeable memory states, with one of the states being a “SET” state and the other being a “RESET” state; the “SET” state passing greater current than the “RESET” state when an electrical field is applied across the programmable material; the “SET” and “RESET” states being interchanged with one another by altering one or both of a concentration of ions and a concentration of ion vacancies in at least one of the first and second regions;
wherein the first region is of a first conductivity type in the “SET” state and the second region is of a second conductivity type in the “SET” state, with the second conductivity type being opposite of the first conductivity type; the first and second regions together comprising a pn diode in the programmable material in the “SET” state; and
altering the ion concentration and/or the ion vacancy concentration in said at least one of the first and second regions to change the programmable material from one memory state to the other.

2. The method of claim 1 wherein the conductive-type state of the first region is n-type in the “SET” state and the conductivity type of the second region is p-type in the “SET” state.

3. The method of claim 1 wherein the conductive-type state of the first region is p-type in the “SET” state and the conductivity type of the second region is n-type in the “SET” state.

4. The method of claim 1 one of the first and second regions comprises conductively-doped semiconductor material and remains the same conductivity type in both the “SET” and “RESET” states.

5. A method of forming and programming a memory cell, comprising:
forming a first region of a programmable material over and directly against a first access line;
forming a second region of the programmable material over the first region;
forming a second access line over and directly against the second region;
wherein the programmable material has two distinguishable and interchangeable memory states, with one of the memory states being a “SET” state and the other being a “RESET” state; the “SET” state passing greater current than the “RESET” state when an electrical field is applied across the programmable material; the “SET” and “RESET” states being interchanged with one another by altering one or both of a concentration of ions and a concentration of ion vacancies in the second region to reversibly form a filament across the second region;
wherein the first region is of a first conductivity type in the “SET” state and the filament is of a second conductivity type in the “SET” state, with the second conductivity type being opposite of the first conductivity type; the first and second regions together comprising a pn diode in the programmable material in the “SET” state; and
altering the ion concentration and/or the ion vacancy concentration in the second region to change the programmable material from one memory state to the other.

6. A method of forming and programming a memory cell, comprising:
forming a programmable material over a first access line; the programmable material having a first region and a second region;
forming a second access line over the programmable material;
wherein the programmable material has two distinguishable and interchangeable memory states, with one of the memory states being a “SET” state and the other being a “RESET” state; the “SET” state passing greater current than the “RESET” state when an electrical field is applied across the programmable material; the “SET” and “RESET” states being interchanged with one another by modifying one or both of a concentration of ions and a concentration of ion vacancies in the second region to reversibly alter the second region;
wherein the first region is of a first conductivity type in the “SET” state and at least part of the second region is of a second conductivity type in the “SET” state, with the second conductivity type being opposite of the first conductivity type; the first and second regions together comprising a pn diode in the programmable material in the “SET” state; and
modifying the ion concentration and/or the ion vacancy concentration in the second region to change the programmable material from one memory state to the other.

7. The method of claim 1 wherein the altering alters the concentration of the ions in at least one of the first and second regions.

8. The method of claim 1 wherein the altering alters the concentration of the ion vacancies in at least one of the first and second regions.

Assignees

• Micron Technology Inc

Inventors

• Liu Jun
• Sandhu Gurtej S

Classifications

• H01L45/1608

  Electricity · mapped topic

• G11C2013/0073

  Write using bi-directional cell biasing · CPC title

• H01L45/08

  Electricity · mapped topic

• G11C13/0069 Primary

  Writing or programming circuits or methods · CPC title

• H01L27/2409

  Electricity · mapped topic