Method for manufacturing multilayer printed wiring board

US9420708B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9420708-B2
Application numberUS-201213427231-A
CountryUS
Kind codeB2
Filing dateMar 22, 2012
Priority dateMar 29, 2011
Publication dateAug 16, 2016
Grant dateAug 16, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for manufacturing a printed wiring board includes preparing a core substrate having a metal layer having a first penetrating hole and insulation layers formed on the metal layer such that the metal layer is interposed between the insulation layers, forming in the core substrate a second penetrating hole having a first opening portion aligned with the first penetrating hole on a first-surface side of the core substrate and a second opening portion aligned with the first penetrating hole on a second-surface side of the core substrate, forming a first conductor on a first surface of the core substrate, forming a second conductor on a second surface of the core substrate on the opposite side of the first surface of the core substrate, and filling a conductive material in the second penetrating hole such that a through-hole conductor connecting the first conductor and the second conductor is formed.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for manufacturing a printed wiring board, comprising: preparing a core substrate comprising a metal layer having a first penetrating hole and a plurality of insulation layers formed on the metal layer such that the metal layer is interposed between the insulation layers; forming in the core substrate a second penetrating hole having a first opening portion aligned with the first penetrating hole on a first-surface side of the core substrate and a second opening portion aligned with the first penetrating hole on a second-surface side of the core substrate; forming a first conductor on a first surface of the core substrate; forming a second conductor on a second surface of the core substrate on an opposite side of the first surface of the core substrate; and filling a conductive material in the second penetrating hole such that a through-hole conductor connecting the first conductor and the second conductor is formed, wherein the first penetrating hole of the metal layer has an inner wall such that the first penetrating hole has a diameter which becomes greater toward a center portion of the metal layer in a thickness direction of the metal layer, the forming of the second penetrating hole comprises setting a straight line passing through a gravity center of the first opening portion and perpendicular to the first surface or second surface of the core substrate off a straight line passing through a gravity center of the second opening portion and perpendicular to the first surface or second surface of the core substrate such that the straight line with respect to passing through the gravity center of the first opening portion is not aligned with the straight line passing through the gravity center of the second opening portion, and the forming of the second penetrating hole comprises forming a juncture portion of the first opening portion and the second opening portion shifted to one of the first-surface side and the second-surface side from a center portion of the metal layer in a thickness direction of the metal layer. 2. The method for manufacturing a multilayer printed wiring board according to claim 1 , wherein the forming of the second penetrating hole in the core substrate comprises irradiating laser from the first-surface side of the core substrate such that the first opening portion is aligned with the first penetrating hole and irradiating laser from the second-surface side of the core substrate such that the second opening portion is aligned with the first penetrating hole. 3. The method for manufacturing a multilayer printed wiring board according to claim 2 , wherein the forming of the second penetrating hole comprises forming a juncture portion of the first opening portion and the second opening portion shifted to one of the first-surface side and the second-surface side from a center portion of the metal layer in a thickness direction of the metal layer. 4. The method for manufacturing a multilayer printed wiring board according to claim 2 , wherein the forming of the second penetrating hole comprises forming the second penetrating hole such that the metal layer is insulated from the through-hole conductor. 5. The method for manufacturing a multilayer printed wiring board according to claim 1 , wherein the forming of the second penetrating hole comprising forming the first opening portion narrowing from the first surface of the core substrate toward the second surface of the core substrate and forming the second opening portion narrowing from the second surface of the core substrate toward the first surface of the core substrate. 6. The method for manufacturing a multilayer printed wiring board according to claim 5 , wherein the forming of the second penetrating hole comprises forming the second penetrating hole such that the metal layer is insulated from the through-hole conductor. 7. The method for manufacturing a multilayer printed wiring board according to claim 1 , wherein the metal layer forms a power-source conductor, and the through-hole conductor forms a signal conductor. 8. The method for manufacturing a multilayer printed wiring board according to claim 1 , wherein the forming of the second penetrating hole comprises forming a juncture portion of the first opening portion and the second opening portion in the first penetrating hole. 9. The method for manufacturing a multilayer printed wiring board according to claim 1 , wherein the forming of the second penetrating hole comprises forming a diameter of the second penetrating hole which is smallest at a juncture portion of the first opening portion and the second opening portion. 10. The method for manufacturing a multilayer printed wiring board according to claim 1 , wherein each of the insulation layers comprises an inorganic fiber and a resin. 11. The method for manufacturing a multilayer printed wiring board according to claim 1 , wherein the preparing of the core substrate comprises filling a resin in the first penetrating hole. 12. The method for manufacturing a multilayer printed wiring board according to claim 1 , wherein the preparing of the core substrate comprises forming the inner wall of the first penetrating hole by etching such that the first penetrating hole has the diameter which becomes greater toward the center portion of the metal layer in the thickness direction of the metal layer. 13. The method for manufacturing a multilayer printed wiring board according to claim 1 , further comprising: forming in one of the insulation layers on the first-surface side of the metal layer a third opening portion extending to the metal layer; and forming a first via conductor connecting the first conductor and the metal layer in the third opening portion. 14. The method for manufacturing a multilayer printed wiring board according to claim 13 , wherein the forming of the third opening portion and the forming of the first opening portion are carried out consecutively. 15. The method for manufacturing a multilayer printed wiring board according to claim 1 , further comprising: forming in one of the insulation layers on the second-surface side of the metal layer a fourth opening portion extending to the metal layer; and forming a second via conductor connecting the second conductor and the metal layer in the fourth opening portion. 16. The method for manufacturing a multilayer printed wiring board according to claim 15 , wherein the forming of the fourth opening portion and the forming of the second opening portion are carried out consecutively. 17. The method for manufacturing a multilayer printed wiring board according to claim 1 , wherein the forming of the first opening portion comprises forming an aperture diameter for forming the first opening portion which is smaller than an opening diameter of the first penetrating hole. 18. The method for manufacturing a multilayer printed wiring board according to claim 1 , wherein the forming of the second opening portion comprises forming an aperture diameter for forming the second opening portion which is smaller than an opening diameter of the first penetrating hole. 19. The method for manufacturing a multilayer printed wiring board according to claim 1 , wherein the forming of the second penetrating hole comprises forming the second penetrating hole such that the metal layer is insulated from the through-hole conductor. 20. The method for manufacturing a multilayer printed wiring board according to claim 1 , wherein the filling of the conductive material comprises fill

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • comprising multiple insulating layers · CPC title

  • of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) · CPC title

  • Through-vias · CPC title

  • of vias therein · CPC title

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What does patent US9420708B2 cover?
A method for manufacturing a printed wiring board includes preparing a core substrate having a metal layer having a first penetrating hole and insulation layers formed on the metal layer such that the metal layer is interposed between the insulation layers, forming in the core substrate a second penetrating hole having a first opening portion aligned with the first penetrating hole on a first-s…
Who is the assignee on this patent?
Hibino Toshiaki, Adachi Takema, Ibiden Co Ltd
What technology area does this patent fall under?
Primary CPC classification H05K3/4608. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 16 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).