Lithography system and method for haze elimination

US9418847B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9418847-B2
Application numberUS-201414163287-A
CountryUS
Kind codeB2
Filing dateJan 24, 2014
Priority dateJan 24, 2014
Publication dateAug 16, 2016
Grant dateAug 16, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure provides an apparatus in semiconductor manufacturing. The apparatus includes a mask, a pellicle frame attached to the mask, and a pellicle joined to the pellicle frame thereby forming a sealed enclosure bounded by the pellicle, the pellicle frame, and the mask. The apparatus further includes photo-catalyst particles introduced into the sealed enclosure before the sealed enclosure is formed. The photo-catalyst particles prevent haze formation within the enclosure during lithography exposure processes.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus in semiconductor manufacturing, comprising: a mask; a pellicle frame attached to the mask; a pellicle joined to the pellicle frame; and photo-catalyst particles, wherein the apparatus provides an enclosure defined by the pellicle, the pellicle frame, and the mask, and the photo-catalyst particles are inside the enclosure, on a circuit pattern area of the mask, and configured to remove contaminants from the enclosure. 2. The apparatus of claim 1 , wherein the photo-catalyst particles have a particle size distribution whose mean particle size plus three times of standard deviation is less than 50 nanometer (nm). 3. The apparatus of claim 1 , wherein the photo-catalyst particles inside the enclosure have a concentration level in a range from 10 8 parts/m 3 to 10 9 parts/m 3 . 4. The apparatus of claim 1 , wherein the photo-catalyst particles have a crystal form of: a mixture of anatase TiO and rutile TiO2, a mixture of rutile TiO 2 and ZnO, ZnO, or a combination thereof. 5. The apparatus of claim 1 , wherein the mask is a transmissive mask. 6. The apparatus of claim 1 , wherein the photo-catalyst particles are attached onto: a surface of the pellicle frame inside the enclosure; a surface of the pellicle inside the enclosure; or a combination thereof. 7. The apparatus of claim 1 , wherein the photo-catalyst particles include: ZrO 2 , Ta 2 O 5 , SnO 2 , KTaO 3 , SrTiO 3 , Nb 2 O 5 , ZnO, BaTiO 3 , or TiO 2 . 8. A method, comprising the steps of: receiving a mask having a surface patterned with an integrated circuit (IC) design layout; attaching a pellicle on a pellicle frame to form a first assembly; and joining the first assembly to the mask in an environment having photo-catalyst particles thereby forming a second assembly, wherein the photo-catalyst particles are filled to a first concentration level in an enclosure defined by the pellicle, the pellicle frame, and the mask, and wherein the photo-catalyst particles are attached to the surface of the mask. 9. The method of claim 8 , further comprising the step of: exposing wafers with the second assembly. 10. The method of claim 9 , wherein the photo-catalyst particles have a particle size that is non-printable during the exposing step. 11. The method of claim 9 , wherein the first concentration level is about 10 times greater than an amine concentration level in an ambient where the exposing step is performed. 12. The method of claim 8 , wherein the photo-catalyst particles include TiO, TiO 2 , or ZnO. 13. The method of claim 8 , wherein the mask is a reflective mask. 14. A method, comprising: receiving a mask, a pellicle frame, and a pellicle; introducing non-printable photo-catalyst particles to at least a surface of: the mask, or the pellicle; and joining the mask, the pellicle frame, and the pellicle thereby forming a mask assembly having an enclosure defined by the mask, the pellicle frame, and the pellicle, wherein the enclosure includes the non-printable photo-catalyst particles on at least one of its inside surfaces. 15. The method of claim 14 , wherein the introducing the non-printable photo-catalyst particles to the surface includes: mixing the non-printable photo-catalyst particles with water (H 2 O) to form a solution; applying the solution to the surface; and drying out the surface. 16. The method of claim 14 , wherein the introducing the non-printable photo-catalyst particles to the surface includes, spraying the non-printable photo-catalyst particles onto the surface. 17. The method of claim 16 , wherein the surface is in a mask region having integrated circuit patterns. 18. The method of claim 14 , wherein the non-printable photo-catalyst particles have a particle size not greater than 30 nanometer (nm). 19. The method of claim 14 , wherein the non-printable photo-catalyst particles inside the enclosure have a concentration level more than 10 8 parts/m 3 but less than 10 9 parts/m 3 . 20. The apparatus of claim 1 , wherein the photo-catalyst particles are attached onto a patterned absorption layer of the mask.

Assignees

Inventors

Classifications

  • Photolithographic processes · CPC title

  • Pollution mitigation, i.e. mitigating effect of contamination or debris, e.g. foil traps · CPC title

  • G03F1/62Primary

    Pellicles, e.g. pellicle assemblies, e.g. having membrane on support frame; Preparation thereof · CPC title

  • Protective coatings · CPC title

  • Materials, e.g. materials for housing, stage or other support having particular properties, e.g. weight, strength, conductivity, thermal expansion coefficient · CPC title

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What does patent US9418847B2 cover?
The present disclosure provides an apparatus in semiconductor manufacturing. The apparatus includes a mask, a pellicle frame attached to the mask, and a pellicle joined to the pellicle frame thereby forming a sealed enclosure bounded by the pellicle, the pellicle frame, and the mask. The apparatus further includes photo-catalyst particles introduced into the sealed enclosure before the sealed e…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P76/2041. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 16 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).