Class AB amplifier with programmable quiescent current

Patent metadata

Field	Value
Publication number	US-9407208-B2
Application number	US-201414535454-A
Country	US
Kind code	B2
Filing date	Nov 7, 2014
Priority date	Nov 7, 2014
Publication date	Aug 2, 2016
Grant date	Aug 2, 2016

Abstract

A Class AB amplifier has a control stage and a push-pull stage. The control stage has a programmable resistor that allows a floating constant voltage to applied to the push-pull stage such that the quiescent current of the amplifier is relatively low. The configuration enables the amplifier to operate properly at relatively low power-supply voltage levels. The amplifier can be configured as the output driver for an operational amplifier (op-amp) with a Miller compensation configuration that replaces the conventional Miller compensation resistor with a transistor that is part of the op-amp.

First claim

What is claimed is:

1. An integrated circuit having an amplifier having an input node and an output node, the amplifier comprising a control stage and a push-pull stage, wherein:
the control stage is connected between the amplifier input node and the push-pull stage;
the push-pull stage is connected between the control stage and the amplifier output node;
the control stage comprises a programmable resistor network configurable to generate dc bias voltages for the push-pull stage, wherein the programmable resistor network comprises a plurality of parallel resistor legs, each resistor leg comprising a configurable switch and a resistor connected in series.

2. The integrated circuit of claim 1 , wherein:
the push-pull stage comprises a P-type device and an N-type device interconnected at the output node; and
the programmable resistor network is connected to apply the dc bias voltages to gates of the P-type and N-type devices.

3. The integrated circuit of claim 1 , wherein the programmable resistor network is connected between a constant-current source and a constant-current sink.

4. The integrated circuit of claim 1 , further comprising a load connected between the output node and a ground.

5. An integrated circuit having an amplifier having an input node and an output node, the amplifier comprising a control stage and a push-pull stage, wherein:
the control stage is connected between the amplifier input node and the push-pull stage;
the push-pull stage is connected between the control stage and the amplifier output node;
the control stage comprises a programmable resistor network configurable to generate dc bias voltages for the push-pull stage, and the programmable resistor network is programmable such that, when the input node is at zero volts, transistors in the push-pull stage are configured near cut-off such that quiescent current through the push-pull stage is low.

6. The integrated circuit of claim 1 , wherein:
the amplifier is configured as an output driver;
the integrated circuit further comprises:
an operational amplifier (op-amp), wherein the output driver is connected to the op-amp; and
a compensation feedback path connected from the output of the output driver to the op-amp.

7. The integrated circuit of claim 6 , wherein:
the compensation feedback path comprises a compensation capacitor; and
the compensation feedback path is connected to a transistor of an output of the op-amp such that the op-amp transistor functions as a resistance device for the compensation feedback path.

8. The integrated circuit of claim 7 , wherein the op-amp transistor is a current-mirror loading device in the op-amp.

9. The integrated circuit of claim 1 , wherein:
the push-pull stage comprises a P-type device and an N-type device interconnected at the output node;
the programmable resistor network is connected to apply the dc bias voltages to gates of the P-type and N-type devices;
the programmable resistor network is connected between a constant-current source and a constant-current sink;
the programmable resistor network comprises a plurality of parallel resistor legs, each resistor leg comprising a configurable switch and a resistor connected in series;
further comprising a load connected between the output node and ground; and
the programmable resistor network is programmable such that, when the input node is at zero volts, transistors in the push-pull stage are configured near cut-off such that quiescent current through the push-pull stage is low.

10. The integrated circuit of claim 4 , wherein:
the amplifier is configured as an output driver;
the integrated circuit further comprises:
an operational amplifier (op-amp), wherein the output driver is connected to the op-amp; and
a compensation feedback path connected from the output of the output driver to the op-amp.

11. The integrated circuit of claim 10 , wherein:
the compensation feedback path comprises a compensation capacitor; and
the compensation feedback path is connected to a transistor of an output of the op-amp such that the op-amp transistor functions as a resistance device for the compensation feedback path.

12. The integrated circuit of claim 11 , wherein the op-amp transistor is a current-mirror loading device in the op-amp.

13. The integrated circuit of claim 12 , wherein:
the push-pull stage comprises a P-type device and an N-type device interconnected at the output node;
the programmable resistor network is connected to apply the dc bias voltages to gates of the P-type and N-type devices;
the programmable resistor network is connected between a constant-current source and a constant-current sink;
the programmable resistor network comprises a plurality of parallel resistor legs, each resistor leg comprising a configurable switch and a resistor connected in series;
further comprising a load connected between the output node and ground; and the programmable resistor network is programmable such that, when the input node is at zero volts, transistors in the push-pull stage are configured near cut-off such that quiescent current through the push-pull stage is low.

14. The integrated circuit of claim 5 , wherein:
the amplifier is configured as an output driver;
the integrated circuit further comprises:
an operational amplifier (op-amp), wherein the output driver is connected to the op-amp; and
a compensation feedback path connected from the output of the output driver to the op-amp.

15. The integrated circuit of claim 14 , wherein:
the compensation feedback path comprises a compensation capacitor; and
the compensation feedback path is connected to a transistor of an output of the op-amp such that the op-amp transistor functions as a resistance device for the compensation feedback path.

16. The integrated circuit of claim 15 , wherein the op-amp transistor is a current-mirror loading device in the op-amp.

Assignees

• Lattice Semiconductor Corp

Inventors

• Ho Vinh
• Chai Carl
• Lin Allan

Classifications

• H03F3/26

  Push-pull amplifiers; Phase-splitters therefor (duplicated single-ended push-pull arrangements or phase-splitters therefor H03F3/30) · CPC title

• H03F1/0205 Primary

  in transistor amplifiers · CPC title

• H03F3/21

  with semiconductor devices only {(H03F3/245 takes precedence)} · CPC title

• H03F2200/129

  there being a feedback over the complete amplifier · CPC title

• H03F2203/45332

  the AAC comprising one or more capacitors as feedback circuit elements · CPC title