Solid-state image pickup element and image pickup apparatus

Patent metadata

Field	Value
Publication number	US-9406707-B2
Application number	US-201514950530-A
Country	US
Kind code	B2
Filing date	Nov 24, 2015
Priority date	Mar 29, 2010
Publication date	Aug 2, 2016
Grant date	Aug 2, 2016

Abstract

Disclosed herein is a solid-state image pickup element, including: a photoelectric conversion region; a transistor; an isolation region of a first conductivity type configured to isolate the photoelectric conversion region and the transistor from each other; a well region of the first conductivity type having the photoelectric conversion region, the transistor, and the isolation region of the first conductivity type formed therein; a contact portion configured to supply an electric potential used to fix the well region to a given electric potential; and an impurity region of the first conductivity type formed so as to extend in a depth direction from a surface of the isolation region of the first conductivity type in the isolation region of the first conductivity type between the contact portion and the photoelectric conversion region, and having a sufficiently higher impurity concentration than that of the isolation region of the first conductivity type.

First claim

What is claimed is:

1. An imaging device, comprising:
a substrate;
a well region in the substrate;
a plurality of photoelectric conversion regions in the well region;
a floating diffusion, an amplifier transistor, a select transistor and a reset transistor shared by at least two of the photoelectric conversion regions;
a contact portion configured to apply a predetermined voltage to the well region;
an isolation region in the well region; and
an impurity region of a first conductivity type between the contact portion and the photoelectric conversion regions,
wherein,
in a plan view, the isolation region is formed so as to have a planar pattern including therein a region of a second conductivity type of the transistors, and the contact portion,
in the plan view, the impurity region is between the region of the second conductivity type of the transistors and the contact portion, and
the contact portions, the select transistor and the amplifier transistor are disposed along a same line between two adjacent rows of the photoelectric conversion regions.

2. The imaging device of claim 1 , further comprising a first conductivity type region beneath the isolation region.

3. The imaging device of claim 2 , further comprising:
two regions of the second conductivity type of two of said transistors are disposed so as to face both sides of said contact portion, respectively; and
an insulator formed on a portion of said isolation region of the first conductivity type, except for a portion between said two regions of the second conductivity type of said two transistors disposed so as to face both sides of said contact portion,
wherein,
said impurity region of the first conductivity type is formed so as to have a planar pattern (a) connected to said two regions of the second conductivity type of said two transistors and (b) surrounding said contact portion in a portion, having no isolation region formed therein, of said isolation region of the first conductivity type.

4. The imaging device of claim 1 , wherein the amplifier transistor and the reset transistor are connected to a same power source.

5. The imaging device of claim 1 , wherein the impurity region is a P+ barrier region.

6. The imaging device of claim 1 comprising:
a barrier in said isolation region of the first conductivity type between said contact portion and said photoelectric conversion region, said barrier acting against a minority carrier injected from said contact portion.

7. The imaging device of claim 6 , wherein said barrier is a region which is formed so as to surround said contact portion and a region of a second conductivity type of at least one of said transistors within said isolation region of the first conductivity type, and has a lower potential than that of said isolation region of the first conductivity type by introducing an impurity of the second conductivity type.

8. The imaging device of claim 1 , further comprising an insulator formed so as to cover said isolation region of the first conductivity type.

9. An electronics device with an imaging device, the imaging device comprising:
a substrate;
a well region in the substrate;
a plurality of photoelectric conversion regions in the well region;
a floating diffusion, an amplifier transistor, a select transistor and a reset transistor shared by at least two of the photoelectric conversion regions;
a contact portion configured to apply a predetermined voltage to the well region;
an isolation region in the well region; and
an impurity region of a first conductivity type between the contact portion and the photoelectric conversion regions,
wherein,
in a plan view, the isolation region is formed so as to have a planar pattern including therein a region of a second conductivity type of the transistors, and the contact portion,
in the plan view, the impurity region is between the region of the second conductivity type of the transistors and the contact portion, and
the contact portions, the select transistor and the amplifier transistor are disposed along a same line between two adjacent rows of the photoelectric conversion regions.

Assignees

• Sony Corp

Inventors

• Yamakawa Shinya

Classifications

• H10F10/10

  having potential barriers · CPC title

• H10F77/413

  directly associated or integrated with the devices, e.g. back reflectors (directly associated or integrated with photovoltaic cells H10F77/42) · CPC title

• H10F39/014

  of CMOS image sensors · CPC title

• H10F39/813

  Electronic components shared by multiple pixels, e.g. one amplifier shared by two pixels · CPC title

• H10F39/807

  Pixel isolation structures · CPC title