Vertically oriented semiconductor device and shielding structure thereof

Patent metadata

Field	Value
Publication number	US-9406604-B2
Application number	US-201414461631-A
Country	US
Kind code	B2
Filing date	Aug 18, 2014
Priority date	Oct 13, 2011
Publication date	Aug 2, 2016
Grant date	Aug 2, 2016

Abstract

The present disclosure involves a semiconductor device. The semiconductor device includes a substrate; a capacitor disposed over the substrate; an inductor disposed over the substrate and having a coil feature surrounding the capacitor; and a shielding structure over the substrate and configured around the coil feature.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a substrate; and
an interconnect structure formed over the substrate, the interconnect structure including:
an inductive coil having one or more turns;
a shielding structure comprising conductive features that surround the inductive coil and conform to the one or more turns; and
a capacitor, the capacitor being surrounded by the inductive coil and the conductive features in at least one layer of the interconnect structure.

2. The semiconductor device of claim 1 , wherein the capacitor includes an anode and a cathode extending in a perpendicular direction from a surface of the substrate and interdigitated in the perpendicular direction.

3. The semiconductor device of claim 1 ,
wherein the shielding structure is coupled to a grounding line.

4. The semiconductor device of claim 3 , wherein:
the shielding structure further includes a first side portion and a second side portion; and
the first and second side portions are interposed by the inductive coil from a top view.

5. The semiconductor device of claim 4 , wherein the first and second side portions each include conductive features at multiple layers of the interconnect structure.

6. The semiconductor device of claim 4 , wherein the shielding structure further includes a bottom portion underlying the inductive coil and connected with the first and second side portions.

7. The semiconductor device of claim 6 , wherein the shielding structure further includes a top portion configured with the first side portion, the second side portion, and the bottom portion such that the inductive coil is enclosed within the shielding structure.

8. The semiconductor device of claim 1 , wherein the capacitor includes a plurality of anodes and cathodes extending in a direction perpendicular to a surface of the substrate.

9. The semiconductor device of claim 1 ,
wherein the capacitor, the inductive coil, and the shielding structure each include a conductive feature at a common layer of the interconnect structure, and wherein the conductive feature of the shielding structure is disposed between the respective conductive features of the capacitor and the inductive coil.

10. A semiconductor device, comprising:
a substrate having a first surface that is defined by an X axis and a Y axis that is perpendicular to the X axis; and
an interconnect structure formed over the first surface, the interconnect structure including:
a capacitor having an anode component and a cathode component;
an inductor; and
a shielding structure comprising conductive lines, wherein a portion of the inductors portion of the shielding structure, and a portion of the capacitor are disposed in one layer of the interconnect structure, and the portion of the inductor surrounds the portion of the shielding structure that surrounds the portion of the capacitor, wherein:
the anode component includes a plurality of first conductive features;
the cathode component includes a plurality of second conductive features; and
the first conductive features are interdigitated with the second conductive features.

11. The semiconductor device of claim 10 , wherein the first conductive features are interdigitated with the second conductive features along both the Y axis and a Z axis that is perpendicular to the first surface.

12. The semiconductor device of claim 11 , wherein the first conductive features and the second conductive features each include: two metal lines extending along the X axis; and at least one metal via extending along the Z axis and interconnecting the two metal lines.

13. The semiconductor device of claim 10 , wherein:
the first conductive features and the second conductive features each extend along a Z axis that is perpendicular to the first surface; and
the first conductive features are interdigitated with the second conductive features along both the X axis and the Y axis.

14. The semiconductor device of claim 10 , wherein:
the inductor is wound around the capacitor and coupled to the capacitor to form an inductor capacitor (LC) tank; and
the inductor includes a coil that is surrounded by the shielding structure.

15. A semiconductor device, comprising:
a substrate having a first surface;
a capacitor disposed over the first surface; and
an inductor disposed over the first surface, wherein a portion of the inductor and a portion of the capacitor are disposed in the same layer of the interconnect structure, and the portion of the inductor surrounds the portion of the capacitor, wherein the inductor includes:
a coil feature having one or more turns; and
a shielding structure around the coil feature and conforming to the one or more turns.

16. The semiconductor device of claim 15 , wherein:
each of the one or more turns is disposed in a respective layer of an interconnect structure; and
the one or more turns are connected through conductive features oriented vertically with respect to the first surface.

17. The semiconductor device of claim 15 , wherein:
the shielding structure further includes a first side portion and a second side portion; and
the first and second side portions are interposed by the coil feature from a top view with respect to the first surface.

18. The semiconductor device of claim 17 , wherein the first and second side portions each include:
a first conductive feature spanning in a first plane parallel to the first surface;
a second conductive feature spanning in a second plane parallel to the first surface; and
a third conductive feature oriented vertically with respect to the first surface and interconnecting the first and second conductive features.

19. The semiconductor device of claim 15 , wherein the capacitor, the coil feature, and the shielding structure each include:
a first conductive feature spanning in a plane parallel to the first surface; and
a second conductive feature oriented vertically with respect to the first surface and connected with the first conductive feature.

20. The semiconductor device of claim 15 , wherein the capacitor includes an anode and a cathode extending in a perpendicular direction to a surface of the substrate and interdigitated in the perpendicular direction, and the capacitor and the inductor are coupled to form an inductor capacitor (LC) tank.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Cho Hsiu-Ying

Classifications

• H10P95/00

  Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

• H10P14/20

  of semiconductor materials · CPC title

• H10W20/496

  Capacitor integral with wiring layers · CPC title

• H10W20/423

  Shielding layers · CPC title

• H10W20/497 Primary

  Inductive arrangements or effects of, or between, wiring layers · CPC title