Multi-layer ceramic capacitor and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9406441-B2
Application number	US-201514791126-A
Country	US
Kind code	B2
Filing date	Jul 2, 2015
Priority date	Sep 27, 2012
Publication date	Aug 2, 2016
Grant date	Aug 2, 2016

Abstract

A multi-layer ceramic capacitor is constituted by ceramic dielectric layers alternately laminated with conductive layers, wherein the ceramic dielectric layers are sintered in such a way that core-shell grains having a core-shell structure are mixed with uniform solid-solution grains resulting from uniform progression of the solid solution process. Such multi-layer ceramic capacitor is characterized in that the area ratio of the core-shell grains to all sintered grains constituting the ceramic dielectric layer is 5 to 15% and that the average grain size of all sintered grains including the core-shell grains and uniform solid-solution grains is 0.3 to 0.5 μm.

First claim

We claim:

1. A multi-layer ceramic capacitor constituted by ceramic dielectric layers alternately laminated with conductive layers, wherein:
each of the ceramic dielectric layers is constituted by sintered grains comprised of core-shell grains each having a core-shell structure wherein a core of primary component is enclosed by a shell of auxiliary solid-solution component, and uniform solid-solution grains each constituted by solid solution without a core;
an area ratio of the core-shell grains to all the sintered grains constituting each ceramic dielectric layer is 5 to 15% as measured in an observed area of cross section by a transmission electron microscope (TEM) of a randomly selected portion of the ceramic dielectric layer with interposing conductive layers; and
a grain size representing an average grain size of all the sintered grains including the core-shell grains and uniform solid-solution grains is 0.3 to 0.5 μm.

2. A multi-layer ceramic capacitor according to claim 1 , wherein a post-sintering thickness of the ceramic dielectric layer between the conductive layers is 2.0 μm or less.

3. A multi-layer ceramic capacitor according to claim 2 , wherein a thickness of the ceramic dielectric layer is 1.2 μm or less.

4. A method of manufacturing a multi-layer ceramic capacitor constituted by ceramic dielectric layers alternately laminated with conductive layers, comprising:
a step to mix a primary component powder of a first grain size constituted by relatively small-sized grains, with a primary component powder of a second grain size constituted by relatively large-sized grains, at a specified blending ratio;
a step to add an auxiliary solid-solution component powder to the primary component powders of the first grain size and second grain size, to prepare a dielectric material powder;
a step to prepare a green sheet by coating the dielectric material powder;
a step to place a conductive paste on the green sheet to form electrode patterns corresponding to two electrodes, one on the left and the other on the right, respectively;
a step to laminate the green sheets in such a way that the electrode patterns of the left and right electrodes alternate; and
a step to sinter the green sheet laminate in such a way that an area ratio of core-shell grains to all sintered grains constituting the ceramic dielectric layer falls between 5 and 15% as measured in an observed area of cross section by a transmission electron microscope (TEM) of a randomly selected portion of the ceramic dielectric layer with interposing conductive layers and that an average grain size of all sintered grains including the core-shell grains and uniform solid-solution grains falls between 0.3 and 0.5 μm.

5. A method of manufacturing a multi-layer ceramic capacitor according to claim 4 , wherein a grain size ratio of the primary component powder of the second grain size to the primary component powder of the first grain size is adjusted to 1.1 to 1.2 times and that a specified blending ratio of the primary component powders of first grain size and second grain size (primary component powder of first grain size: primary component powder of second grain size) is in a range of 8:2 to 3:7 based on volume ratio.

Assignees

• Taiyo Yuden Kk

Inventors

• Morita Koichiro
• Mizuno Youichi

Classifications

• H01G4/012

  Form of non-self-supporting electrodes · CPC title

• H01G4/20

  using combinations of dielectrics from more than one of groups H01G4/02 - H01G4/06 (H01G4/12 takes precedence) · CPC title

• H01G4/1227

  based on alkaline earth titanates · CPC title

• H01G4/12 Primary

  Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

• H01G4/30 Primary

  Stacked capacitors (H01G4/33 takes precedence) · CPC title