Suppressing offset, offset drift, and 1/f noise during analog/digital conversion

US9401725B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9401725-B2
Application numberUS-201514631324-A
CountryUS
Kind codeB2
Filing dateFeb 25, 2015
Priority dateMar 12, 2014
Publication dateJul 26, 2016
Grant dateJul 26, 2016

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A circuit arrangement is provided for suppressing offset, offset drift, and 1/f noise during analog/digital conversion. The arrangement includes an analog/digital converter configured to convert an analog input signal into output data, an inverter configured to invert the input signal, a switching element connected upstream of the analog/digital converter and downstream of the inverter and configured to periodically change over between the input signal and the inverted input signal at a predefinable switching frequency, and a switchable negator circuit connected downstream of the analog/digital converter and configured to periodically negate the output data from the analog/digital converter at the switching frequency, the output data being negated when the inverted input signal is applied to the analog/digital converter. An analog/digital converter is also provided with suppression of offset, offset drift, and 1/f noise during analog/digital conversion. A gradient amplifier having a circuit arrangement or an analog/digital converter is also provided.

First claim

Opening claim text (preview).

The invention claimed is: 1. A circuit arrangement for suppressing offset, offset drift, and 1/f noise during analog/digital conversion, the circuit arrangement comprising: an analog/digital converter configured to convert an analog input signal into output data; an inverter configured to invert the input signal; at least one switching element connected upstream of the analog/digital converter and downstream of the inverter and configured to periodically change over between the input signal and the inverted input signal at a predefinable switching frequency, wherein the predefinable switching frequency is higher than a 1/f noise frequency and less than a conversion frequency of the analog/digital converter; and a switchable negator circuit connected downstream of the analog/digital converter and configured to periodically negate the output data from the analog/digital converter at the same predefinable switching frequency, wherein the output data is negated when the inverted input signal is applied to the analog/digital converter, wherein the offset, the offset drift, and the 1/f noise are converted into a high-frequency alternating signal without offset and without an imaging effect for a magnetic resonance high-field system. 2. The circuit arrangement as claimed in claim 1 , wherein the predefinable switching frequency is at most half as high as the conversion frequency of the analog/digital converter. 3. The circuit arrangement as claimed in claim 2 , further comprising: an analog/digital control unit configured to control the at least one switching element and the switchable negator circuit. 4. The circuit arrangement as claimed in claim 3 , wherein the at least one switching element comprises two switching elements, wherein one switching element is connected upstream of a positive input and the other switching element is connected upstream of a negative input of the analog/digital converter. 5. The circuit arrangement as claimed in claim 4 , further comprising: a dithering unit connected upstream of the inverter and configured to provide the input signal and the inverted input signal with dithering. 6. The circuit arrangement as claimed in claim 1 , further comprising: an analog/digital control unit configured to control the at least one switching element and the switchable negator circuit. 7. The circuit arrangement as claimed in claim 1 , wherein the at least one switching element comprises two switching elements, wherein one switching element is connected upstream of a positive input and the other switching element is connected upstream of a negative input of the analog/digital converter. 8. The circuit arrangement as claimed in claim 1 , wherein the at least one switching element is connected upstream of a positive input of the analog/digital converter; and wherein a reference ground is connected to a negative input of the analog/digital converter. 9. The circuit arrangement as claimed in claim 8 , further comprising: a dithering unit connected upstream of the inverter and configured to provide the input signal and the inverted input signal with dithering. 10. The circuit arrangement as claimed in claim 1 , wherein the at least one switching element is connected upstream of a positive input of the analog/digital converter; and wherein a dithering unit is connected to a negative input of the analog/digital converter. 11. The circuit arrangement as claimed in claim 1 , wherein the switchable negator circuit comprises: a negator; and a polarity selection switch connected downstream of the negator. 12. The circuit arrangement as claimed in claim 11 , wherein the negator is configured to multiply the output data by “−1”. 13. The circuit arrangement as claimed in claim 11 , wherein the negator is configured to invert bits of the output data. 14. The circuit arrangement as claimed in claim 1 , further comprising: an anti-aliasing filter arranged at an input of the circuit arrangement and configured to filter the input signal. 15. The circuit arrangement as claimed in claim 1 , further comprising: a voltage follower connected downstream of the at least one switching element. 16. An analog/digital converter with suppression of offset, offset drift, and 1/f noise during analog/digital conversion, wherein the analog/digital converter is configured to convert an analog input signal into output data, wherein an inverter is configured to invert the input signal, wherein two switching elements are connected upstream of the analog/digital conversion and downstream of the inverter and are configured to periodically change over between the input signal and the inverted input signal at a predefinable switching frequency, wherein the predefinable switching frequency is higher than a 1/f noise frequency and less than a conversion frequency of the analog/digital converter, wherein a switchable negator circuit is connected downstream of the analog/digital conversion and is configured to periodically negate the output data from the analog/digital conversion at the same predefinable switching frequency, wherein the output data is negated when the inverted input signal is applied, and wherein the offset, the offset drift, and the 1/f noise are converted into a high-frequency alternating signal without offset and without an imaging effect for a magnetic resonance high-field system. 17. An analog/digital converter with suppression of offset, offset drift, and 1/f noise during analog/digital conversion, wherein the analog/digital converter is configured to convert an analog positive input signal and a negative input signal into output data, wherein two switching elements are connected upstream of the analog/digital conversion and are configured to periodically change over between the positive input signal and the negative input signal at a predefinable switching frequency, wherein the predefinable switching frequency is higher than a 1/f noise frequency and less than a conversion frequency of the analog/digital converter, wherein a switchable negator circuit is connected downstream of the analog/digital conversion and is configured to periodically negate the output data from the analog/digital conversion at the same predefinable switching frequency, and wherein the offset, the offset drift, and the 1/f noise are converted into a high-frequency alternating signal without offset and without an imaging effect for a magnetic resonance high-field system. 18. The analog/digital converter as claimed in claim 17 , wherein a voltage follower is connected downstream of the two switching elements. 19. A gradient amplifier comprising: a circuit arrangement comprising: an analog/digital converter configured to convert an analog input signal into output data; an inverter configured to invert the input signal; at least one switching element connected upstream of the analog/digital converter and downstream of the inverter and configured to periodically change over between the input signal and the inverted input signal at a predefinable switching frequency, wherein the predefinable switching frequency is higher than a 1/f noise frequency and less than a conversion frequency of the analog/digital converter; and a switchable negator circuit connected downstream of the analog/digital converter and configured to periodically negate the output data from the analog/digital converter at the same predefinable switching frequency, wherein the output data is negated when the inverted input signal is applied to the analog/digital converter, wherein

Assignees

Inventors

Classifications

  • using dither, e.g. using triangular or sawtooth waveforms (for increasing resolution H03M1/201) · CPC title

  • H03M1/0607Primary

    Offset or drift compensation (removal of offset already present on the analogue input signal H03M1/1295) · CPC title

  • Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

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What does patent US9401725B2 cover?
A circuit arrangement is provided for suppressing offset, offset drift, and 1/f noise during analog/digital conversion. The arrangement includes an analog/digital converter configured to convert an analog input signal into output data, an inverter configured to invert the input signal, a switching element connected upstream of the analog/digital converter and downstream of the inverter and conf…
Who is the assignee on this patent?
Lenz Helmut, Siemens Ag
What technology area does this patent fall under?
Primary CPC classification H03M1/0607. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).