Coulomb counter circuitry
US-12101097-B2 · Sep 24, 2024 · US
US9197239B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9197239-B2 |
| Application number | US-201514592020-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 8, 2015 |
| Priority date | Jan 8, 2014 |
| Publication date | Nov 24, 2015 |
| Grant date | Nov 24, 2015 |
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Methods and systems for an analog-to-digital converter with near-constant common mode voltage may comprise, in an analog-to-digital converter (ADC) having sampling switches on each of two input lines to the ADC, N double-sided and M single-sided switched capacitors on each input line: sampling an input voltage by closing the sampling switches, opening the sampling switches and comparing voltage levels between the input lines, iteratively switching the double-sided switched capacitors between a reference voltage (Vref) and ground, and iteratively switching the single-sided switched capacitors between ground and voltages that may equal Vref/2 x where x ranges from 0 to m−1 and m is a number of single-sided switched capacitors per input line. A common mode offset of the ADC may be less than V ADC — fs /128 +V ADC — fs /256+V ADC — fs /512+V ADC — fs /1024 when m equals 4 and where V ADC — fs is the full-scale voltage of the ADC.
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What is claimed is: 1. A method for communication, the method comprising: in an analog-to-digital converter (ADC) comprising sampling switches on each of two input lines to the ADC, N double-sided switched capacitors, and M single-sided switched capacitors on each input line: sampling an input voltage by closing the sampling switches; opening the sampling switches and comparing voltage levels between the input lines; iteratively switching the double-sided switched capacitors…
Electricity · mapped topic
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