Method for manufacture of wire bondable and solderable surfaces on noble metal electrodes

US9401466B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9401466-B2
Application numberUS-201314435472-A
CountryUS
Kind codeB2
Filing dateNov 14, 2013
Priority dateDec 5, 2012
Publication dateJul 26, 2016
Grant dateJul 26, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present invention relates to a method for manufacture of wire bondable and solderable surfaces on noble metal electrodes. The noble metal electrodes are activated by depositing a seed layer of palladium or a palladium alloy layer by electroless plating at 60 to 90° C. Next, an intermediate layer is deposited onto the seed layer followed by deposition of the wire bondable and/or solderable surface finish layer(s) onto the intermediate layer. This method is particularly suitable in the production of optoelectronic devices such as light emitting diodes (LEDs).

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for manufacture of wire bondable and/or solderable surfaces on noble metal electrodes comprising, in this order, the steps of i. providing a substrate having at least one noble metal electrode attached thereon, ii. cleaning said at least one noble metal electrode, iii. depositing onto said at least one noble metal electrode a seed layer selected from palladium and palladium alloys by electroless plating from an aqueous plating bath wherein said plating bath has a temperature in the range of 60 to 90° C. during deposition of said seed layer and wherein said plating bath comprises a source for palladium ions, a reducing agent and a complexing agent for palladium ions, iv. depositing an intermediate layer selected from nickel alloys and cobalt alloys onto said seed layer by electroless plating, v. depositing at least one surface finish layer onto the intermediate layer by electroless plating wherein said at least one surface finish layer is selected from the group consisting of palladium, palladium alloys, gold and gold alloys, with the proviso that a single surface layer consisting of gold is deposited by immersion plating and the gold layer of a multilayer surface finish is deposited either by immersion plating or electroless plating onto a palladium or palladium alloy layer. 2. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 1 wherein the at least one electrode comprises one or more of platinum, gold and palladium. 3. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 1 wherein the aqueous plating bath as applied in step iii. further comprises a sulfimide compound. 4. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 3 wherein the sulfimide compound is saccharin. 5. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 3 wherein the concentration of the sulfimide compound ranges from 0.001 to 0.1 mol/l. 6. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 1 wherein the plating bath has a temperature in the range of 60 to 80° C. during deposition of said seed layer. 7. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 1 wherein the seed layer is made of palladium. 8. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 1 wherein the reducing agent in the plating bath for deposition of the seed layer is selected from the group consisting of formic acid, a derivative thereof and a salt thereof. 9. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 1 wherein the substrate comprising at least one electrode is selected from sapphire wafers, silicon wafers and indium tin oxide wafers. 10. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 1 wherein the at least one surface finish layer is a palladium layer. 11. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 1 wherein the at least one surface finish layer is a gold layer. 12. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 1 wherein the surface finish consists of a palladium layer and a gold layer plated on top of the palladium layer. 13. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 3 wherein the at least one surface finish layer is a palladium layer. 14. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 3 wherein the at least one surface finish layer is a gold layer. 15. The method for manufacture of wire bondable and solderable surfaces on noble metal electrodes according to claim 3 wherein the surface finish consists of a palladium layer and a gold layer plated on top of the palladium layer.

Assignees

Inventors

Classifications

  • by plating, e.g. electroless plating or electroplating · CPC title

  • in liquid form, e.g. spin coating, spray coating or immersion coating · CPC title

  • by plating, e.g. electroless plating or electroplating · CPC title

  • Forming coatings · CPC title

  • comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title

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Frequently asked questions

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What does patent US9401466B2 cover?
The present invention relates to a method for manufacture of wire bondable and solderable surfaces on noble metal electrodes. The noble metal electrodes are activated by depositing a seed layer of palladium or a palladium alloy layer by electroless plating at 60 to 90° C. Next, an intermediate layer is deposited onto the seed layer followed by deposition of the wire bondable and/or solderable s…
Who is the assignee on this patent?
Atotech Deutschland Gmbh
What technology area does this patent fall under?
Primary CPC classification H10H20/857. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).