Three dimensional nand device with channel contacting conductive source line and method of making thereof
US-2015380418-A1 · Dec 31, 2015 · US
E-flash cell band engineering for erasing speed enhancement
US9401434B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9401434-B2 |
| Application number | US-201414489902-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 18, 2014 |
| Priority date | Sep 18, 2014 |
| Publication date | Jul 26, 2016 |
| Grant date | Jul 26, 2016 |
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Abstract
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The present disclosure relates to a structure and method for forming a flash memory cell with an improved erase speed and erase current. Si dots are used for charge trapping and an ONO sandwich structure is formed over the Si dots. Erase operation includes direct tunneling as well as FN tunneling which helps increase erase speed without compensating data retention.
First claim
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What is claimed is: 1. A flash memory cell comprising: a semiconductor substrate; a tunnel oxide layer disposed over the semiconductor substrate; a plurality of quantum dots disposed over the tunnel oxide layer; and an ONO sandwich structure disposed over the plurality of quantum dots; wherein the ONO sandwich structure comprises: a first oxide layer disposed above the plurality of quantum dots, a nitride layer disposed above the first oxide layer, and a second oxide…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9401434B2 cover?
- The present disclosure relates to a structure and method for forming a flash memory cell with an improved erase speed and erase current. Si dots are used for charge trapping and an ONO sandwich structure is formed over the Si dots. Erase operation includes direct tunneling as well as FN tunneling which helps increase erase speed without compensating data retention.
- Who is the assignee on this patent?
- Taiwan Semiconductor Mfg Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10D30/683. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jul 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).