FinFET fin bending reduction

Patent metadata

Field	Value
Publication number	US-9401302-B2
Application number	US-201514665934-A
Country	US
Kind code	B2
Filing date	Mar 23, 2015
Priority date	Jun 28, 2013
Publication date	Jul 26, 2016
Grant date	Jul 26, 2016

Abstract

An embodiment method of controlling fin bending in a fin field-effect transistor (FinFET) includes forming an isolation region over a substrate, performing a first annealing process, the first annealing process including a first wet anneal, a second wet anneal, and a first dry anneal. In an embodiment, the first annealing process is followed by a chemical mechanical planarization (CMP) process, an etching process, and a second annealing process for the isolation region.

First claim

What is claimed is:

1. A method of forming a fin field-effect transistor (FinFET), the method comprising:
forming an isolation region between adjacent fins;
performing a first wet anneal, the first wet anneal reducing impurities from the isolation region;
performing a second wet anneal; and
after performing the first wet anneal and the second wet anneal, performing a first dry anneal.

2. The method of claim 1 , wherein the second wet anneal forms silan…

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Tsai Chun Hsiung
• Tsai Shiang-Rung

Classifications

• H10P95/90

  Electricity · mapped topic

• H10W10/17

  Electricity · mapped topic

• H10W10/014 Primary

  Electricity · mapped topic

• H10D30/024

  Electricity · mapped topic

• H01L21/76224 Primary

  Electricity · mapped topic