Method for positioning semiconductor devices and corresponding positioning apparatus
US-2024329125-A1 · Oct 3, 2024 · US
US9400310B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9400310-B2 |
| Application number | US-201313939189-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 11, 2013 |
| Priority date | Dec 24, 2012 |
| Publication date | Jul 26, 2016 |
| Grant date | Jul 26, 2016 |
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An electronic device with COF package is provided. The electronic device includes a flexible substrate, a core circuit unit, multiple output pads, multiple switching elements, and a common test pad. The flexible substrate includes a non-cutting-out area and a cutting-out area. The core circuit unit and output pads are disposed in the non-cutting-out area. First terminals of the switching elements are respectively and electrically connected to output pads of the core circuit unit, and second terminals of the switching elements are respectively and electrically connected to the output pads. The common test pad is disposed in the cutting-out area and electrically connected to the output pads. In a test stage, the switching elements are sequentially turned on such that one of multiple output signals of the core circuit unit is transmitted to the common test pad.
Opening claim text (preview).
What is claimed is: 1. An electronic device with chip-on-film package, comprising: a flexible substrate at least comprising a non-cutting-out area and a cutting-out area; a core circuit unit disposed in the non-cutting-out area; multiple switching elements comprising a first switching element and a second switching element, wherein a first terminal of the first switching element is electrically connected to a first output terminal of the core circuit unit, and a first terminal of the second switching element is electrically connected to a second output terminal of the core circuit unit; multiple output pads disposed in the non-cutting-out area, wherein the multiple output pads comprise a first output pad and a second output pad, the first output pad is electrically connected to a second terminal of the first switching element, the first output pad is electrically connected to the first output terminal of the core circuit unit through the first switching element when the first switching element is turned on, the second output pad is electrically connected to a second terminal of the second switching element, and the second output pad is electrically connected to the second output terminal of the core circuit unit through the second switching element when the second switching element is turned on; and a common test pad disposed in the cutting-out area, wherein the common test pad is electrically connected to the output pads, the common test pad is electrically connected to the first output terminal of the core circuit unit through the first output pad and the first switching element when the first switching element is turned on, and the common test pad is electrically connected to the second output terminal of the core circuit unit through the second output pad and the second switching element when the second switching element is turned on; wherein, in a test stage, the switching elements are sequentially turned on in different time such that one of multiple output signals of the core circuit unit is transmitted to the common test pad. 2. The electronic device according to claim 1 , wherein in a normal operation stage, the switching elements are all turned on and the cutting-out area has been removed. 3. The electronic device according to claim 1 , further comprising a control circuit disposed in the non-cutting-area, the control circuit outputting multiple control signals to control these switching elements. 4. The electronic device according to claim 1 , wherein the switching elements are tri-stage buffers or transmission gates. 5. The electronic device according to claim 1 , wherein one of the switching elements comprises: a first transistor, wherein a first terminal of the first transistor is coupled to a system voltage, and a second terminal of the first transistor is coupled to one of the output pads; a second transistor, wherein a first terminal of the second transistor is coupled to the second terminal of the first transistor, and a second terminal of the second transistor is coupled to a ground voltage; a first switch, wherein a first terminal of the first switch is coupled to the system voltage, and a second terminal of the first switch is coupled to a control terminal of the first transistor; a second switch, wherein a first terminal of the second switch is coupled to a control terminal of the second transistor, and a second terminal of the second switch is coupled to the ground voltage; a third switch, wherein a first terminal of the third switch is coupled to the core circuit unit, and a second terminal of the third switch is coupled to the control terminal of the first transistor; and a fourth switch, wherein a first terminal of the fourth switch is coupled to the control terminal of the second transistor, and a second terminal of the fourth switch is coupled to the core circuit unit. 6. The electronic device according to claim 1 , wherein output terminals of the switching elements are electrically connected to the common test pad through different film leads. 7. The electronic device according to claim 1 , further comprising: multiple input pads disposed in the non-cutting-out area, wherein the input pads comprises a first input pad and a second input pad; a common input pad disposed in the cutting-out area, wherein the common input pad is electrically connected to the input pad; and multiple input switching elements comprising a first input switching element and a second input switching element, wherein a first terminal and a second terminal of the first input switching element are electrically connected to a first input terminal of the core circuit unit and the first input pad, respectively, and a first terminal and a second terminal of the second input switching element are electrically connected to a second input terminal of the core circuit unit and the second input pad. 8. The electronic device according to claim 7 , wherein, in the test stage, the input switching elements are sequentially turned on, such that the signal of the common input pad is transmitted to one of multiple input terminals of the core circuit unit. 9. The electronic device according to claim 8 , wherein, in a normal operation stage, the input switching elements are all turned on, and the cutting-out area has been removed.
Optimisation aspects, e.g. using functional pin as test pin, pin multiplexing · CPC title
Aspects of quality control [QC] (G01R31/31718 takes precedence; program control for QC G05B19/41875) · CPC title
Testing of IC packages; Test features related to IC packages (containers per se H10W76/10, encapsulations per se H10W74/00) · CPC title
using dedicated test connectors, test elements or test circuits on the IC under test (G01R31/2855 takes precedence) · CPC title
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