Wafer polishing method

Patent metadata

Field	Value
Publication number	US-9399274-B2
Application number	US-201414167898-A
Country	US
Kind code	B2
Filing date	Jan 29, 2014
Priority date	Jan 30, 2013
Publication date	Jul 26, 2016
Grant date	Jul 26, 2016

Abstract

An apparatus and method of polishing a substrate is described. The polishing includes: rotating a substrate; pressing a first polishing tool against an edge portion of the substrate to polish the edge portion; and pressing a second polishing tool against the edge portion of the substrate to polish the edge portion. The second polishing tool is located more inwardly than the first polishing tool with respect to a radial direction of the substrate. The first polishing tool has a polishing surface rougher than a polishing surface of the second polishing tool.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor, comprising:
rotating a semiconductor wafer having a bevel portion and an edge portion, the bevel portion being an outermost circumferential portion, and the edge portion being a flat portion located radially inwardly of the bevel portion;
applying a first polishing tool against the edge portion of the semiconductor wafer to polish the edge portion; and
applying a second polishing tool against the edge portion of the semiconductor wafer to polish the edge portion, the second polishing tool being located more inwardly than the first polishing tool with respect to a radial direction of the semiconductor wafer,
the first polishing tool having a polishing surface more abrasive than a polishing surface of the second polishing tool.

2. The method of manufacturing a semiconductor according to claim 1 , further comprising:
bringing the second polishing tool into contact with the edge portion of the semiconductor wafer after a predetermined time has elapsed from a time when the first polishing tool is brought into contact with the edge portion of the substrate.

3. The method of manufacturing a semiconductor according to claim 1 , wherein a contact width of the first polishing tool is equal to or larger than a contact width of the second polishing tool while contacting the edge portion of the semiconductor wafer.

4. The method of manufacturing a semiconductor according to claim 1 , wherein a removal rate of the edge portion polished by the first polishing tool is higher than a removal rate of the edge portion polished by the second polishing tool.

5. The method of manufacturing a semiconductor according to claim 1 , wherein the first polishing tool is a polishing tool for rough-polishing of the semiconductor wafer, and the second polishing tool is a polishing tool for finish-polishing of the semiconductor wafer.

6. The method of manufacturing a semiconductor according to claim 1 , wherein at least one of the first polishing tool and the second polishing tool comprises a polishing tape or a grindstone.

7. The polishing method according to claim 1 , wherein the first polishing tool is applied against the edge portion in a direction perpendicular to the edge portion.

8. The polishing method according to claim 1 , wherein the polishing surface of the first polishing tool, which is in contact with the edge portion, is parallel to the edge portion.

9. A method of manufacturing a semiconductor, comprising:
rotating a substrate having a bevel portion and an edge portion, the bevel portion being an outermost circumferential portion, and the edge portion being a flat portion located radially inwardly of the bevel portion;
pressing a first polishing tool against an edge portion of the substrate to polish the edge portion; and
pressing a second polishing tool against the edge portion of the substrate to polish the edge portion, the second polishing tool being located more inwardly than the first polishing tool with respect to a radial direction of the substrate,
the first polishing tool having a polishing surface rougher than a polishing surface of the second polishing tool.

10. The polishing method according to claim 9 , further comprising:
bringing the second polishing tool into contact with the edge portion of the substrate after a predetermined time has elapsed from a time when the first polishing tool is brought into contact with the edge portion of the substrate.

11. The polishing method according to claim 9 , wherein a contact width of the first polishing tool is equal to or larger than a contact width of the second polishing tool while contacting the edge portion of the substrate.

12. The polishing method according to claim 9 , wherein a removal rate of the edge portion polished by the first polishing tool is higher than a removal rate of the edge portion polished by the second polishing tool.

13. The polishing method according to claim 9 , wherein the first polishing tool is a polishing tool for rough-polishing of the substrate, and the second polishing tool is a polishing tool for finish-polishing of the substrate.

14. The polishing method according to claim 9 , wherein the first polishing tool is a first polishing tape and the second polishing tool is a second polishing tape.

15. The polishing method according to claim 9 , wherein the first polishing tool is a first grindstone and the second polishing tool is a second grindstone.

16. The polishing method according to claim 9 , wherein the first polishing tool is applied against the edge portion in a direction perpendicular to the edge portion.

17. The polishing method according to claim 9 , wherein the polishing surface of the first polishing tool, which is in contact with the edge portion, is parallel to the edge portion.

Assignees

• Ebara Corp

Inventors

• Togawa Tetsuji
• Yoshida Atsushi
• Watanabe Toshifumi

Classifications

• H10P95/60

  Mechanical treatments, e.g. by ultrasounds · CPC title

• H10P90/18

  by shaping · CPC title

• H10P54/00

  Cutting or separating of wafers, substrates or parts of devices · CPC title

• H10P52/00

  Grinding, lapping or polishing of wafers, substrates or parts of devices · CPC title

• H01L21/463

  Electricity · mapped topic