Memory device having a stacked variable resistance layer
US-9202845-B2 · Dec 1, 2015 · US
US9397144B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9397144-B2 |
| Application number | US-201414483954-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 11, 2014 |
| Priority date | Feb 26, 2010 |
| Publication date | Jul 19, 2016 |
| Grant date | Jul 19, 2016 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
According to one embodiment, a non-volatile semiconductor memory device includes: a semiconductor substrate; a plurality of first lines; a plurality of second lines; and a plurality of non-volatile memory cells arranged at positions where the plurality of first lines intersect with the plurality of second lines, wherein each of the plurality of non-volatile memory cells includes a resistance change element and a rectifying element connected in series to the resistance change element, and a resistance change film continuously extending over the plurality of second lines is arranged between the plurality of first lines and the plurality of second lines, and the resistance change element includes a portion where the first line intersect with the second line in the resistance change film.
Opening claim text (preview).
What is claimed is: 1. A non-volatile semiconductor memory device comprising: a semiconductor substrate; a plurality of first lines arranged side by side in a first plane approximately vertical to a surface of the semiconductor substrate, each of the plurality of first lines extending along the surface of the semiconductor substrate; a plurality of second lines arranged side by side in a second plane along the first plane, each of the plurality of second lines extending approx…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Related publications grouped by family.
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Answers are generated from the same data shown on this page.