Semiconductor device

US9391183B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9391183-B2
Application numberUS-201514669189-A
CountryUS
Kind codeB2
Filing dateMar 26, 2015
Priority dateSep 20, 2013
Publication dateJul 12, 2016
Grant dateJul 12, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A semiconductor device is disclosed that comprises semiconductor regions and an insulating film. A groove extends from a top surface of a semiconductor region and reaching a semiconductor region. In plan view, a body of a bottom electrode is formed in a strip form, and extends in an extending direction of the groove, and the connection portion extends in a depth direction of the groove and is connected to an end of the body in the extending direction of the body. The body of the bottom electrode is arranged in the groove, and the connection portion of the bottom electrode is arranged in the connection groove. In plan view, a length of the groove in the extending direction of the groove is larger than a width of the groove, and the width of the groove is larger than a gap between the groove and an adjacent groove.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device comprising: a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type arranged on the first semiconductor region; a third semiconductor region of the first conductivity type arranged on the second semiconductor region; a fourth semiconductor region of a second conductivity type arranged on the third semiconductor region; a groove extending from a top surface of the fourth semiconductor region and reaching the second semiconductor region through the fourth semiconductor region and the third semiconductor region; an insulation film arranged on an inner wall of the groove, a control electrode arranged on the insulation film at a side surface of the groove, the control electrode facing the third semiconductor region; a connection groove connected to ends of the groove, the connection groove extending from the top surface of the fourth semiconductor region and reaching the second semiconductor region through the fourth semiconductor region and the third semiconductor region; a first main electrode electrically connected to the first semiconductor region, a second main electrode electrically connected to the fourth semiconductor region; and a bottom electrode arranged on the insulation film at a bottom surface of the groove and spaced from the control electrode, wherein— the bottom electrode comprises a body arranged at the bottom surface of the groove and a connection portion electrically connected to the main body, in plan view, the body is formed in a strip form, and extends in an extending direction of the groove, and the connection portion extends in a depth direction of the groove and is connected to an end of the body in the extending direction of the body, the body of the bottom electrode is arranged in the groove, and the connection portion of the bottom electrode is arranged in the connection groove, and in plan view, a length of the groove in the extending direction of the groove is larger than a width of the groove, and the width of the groove is larger than a gap between the groove and an adjacent groove. 2. The semiconductor device according to claim 1 , wherein the groove has a width of 3 μm to 20 μm, the groove has a depth of 2 μm to 10 μm, the second semiconductor region has a thickness of 40 μm to 140 μm, and the second semiconductor region has a resistivity of 10 Ωcm to 150 Ωcm. 3. The semiconductor device according to claim 1 , wherein— an interface between the second semiconductor region and the third semiconductor region is located between the adjacent groove, and the interface in a region far from the groove is located closer to the first semiconductor region than the interface in regions adjoining the groove is. 4. The semiconductor device according to claim 1 , wherein a length of the bottom electrode in a widthwise direction of the groove is larger than the gap between the adjacent groove. 5. The semiconductor device according to claim 1 , wherein the width of the groove is larger than a depth of the groove, and the width of the groove is 3 to 20 μm. 6. The semiconductor device according to claim 1 , wherein the bottom electrode is arranged to face 70% or more of the bottom surface of the groove. 7. A semiconductor device comprising: a groove formed on a front surface of a semiconductor substrate; a gate electrode arranged in contact with an oxide film formed on an inner surface of the groove; a first main electrode formed on the front surface of the semiconductor substrate; and a second main electrode formed on a back surface of the semiconductor substrate; switching of an operating current flowing between the first main electrode and the second main electrode being controlled by a voltage applied to the gate electrode, wherein the gate electrode is at least partially removed from a bottom surface of the groove, a bottom electrode separated from the gate electrode is arranged on a portion of the oxide film at the bottom surface of the groove from which the gate electrode is removed, the bottom electrode is electrically connected to the first main electrode, and in plan view, a body of the bottom electrode is arranged in the groove, and a connection portion of the bottom electrode is arranged in a connection groove, and each control electrode extends in the groove, in an extending direction of the groove, beyond the connection portion of the bottom electrode and is raised outside of the groove. 8. The semiconductor device according to claim 7 , wherein the bottom electrode comprises a body arranged on the bottom surface of the groove, and a connection portion electrically connecting the body to the second main electrode, wherein, in plan view, the body is formed in a strip shape and extends in the extending direction of the groove, and the connection portion extends in the depth direction of the groove, and a dimension of the body in the depth direction of the groove is larger than a dimension of the connection portion in the depth direction of the groove. 9. The semiconductor device according to claim 1 , wherein the groove include groove arranged side by side, the adjacent groove are connected to each other through the connection groove, the connection groove is formed extending from the top surface of the fourth semiconductor region and reaching the second semiconductor region through the third semiconductor region, and the width of the connection groove is larger than the gap between the adjacent groove, the bottom electrode includes the body arranged on the bottom surface of the groove, and the connection portion electrically connecting the body to the second main electrode, in plan view, the body is formed in the strip shape and extends in the extending direction of the groove, and the connection portion extends in the depth direction of the groove, the body is arranged inside the connection groove, and a width of the connection portion is larger than a width of the body. 10. The semiconductor device according to claim 1 , wherein the groove includes groove arranged side by side, the adjacent groove are connected to each other through the connection groove, the connection groove is formed extending from the top surface of the fourth semiconductor region and reaching the second semiconductor region through the third semiconductor region, and the control electrodes are connected to each other on an inner side surface of the connection groove. 11. The semiconductor device according to claim 1 , wherein the bottom electrode includes the body arranged on the bottom surface of the groove, and the connection portion electrically connecting the body to the second main electrode, in plan view, the body is formed in the strip shape and extends in the extending direction of the groove, and the connection portion extends in the depth direction of the groove, the groove includes groove arranged side by side, the adjacent groove are connected to each other through the connection groove, the connection groove is formed extending from the top surface of the fourth semiconductor region and reaching the second semiconductor region through the third semiconductor region, an end of the body is arranged inside the connection groove, the control electrode is connected to a bus line through a connection portion of the control electrode, the connection portion of the control electrode includes: a first portion formed on an inner side surface of the connection groove, a second portion connected to the first portion, and formed on a bottom surface of the connection groove to extend between the ends of the b

Assignees

Inventors

Classifications

  • of electrodes ohmically coupled to a semiconductor · CPC title

  • Emitter or collector electrodes for bipolar transistors · CPC title

  • Body regions of DMOS transistors or IGBTs  (cell layout of DMOS H10D62/127) · CPC title

  • characterised by their top-view geometrical layouts · CPC title

  • characterised by their lengths or sectional shapes · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9391183B2 cover?
A semiconductor device is disclosed that comprises semiconductor regions and an insulating film. A groove extends from a top surface of a semiconductor region and reaching a semiconductor region. In plan view, a body of a bottom electrode is formed in a strip form, and extends in an extending direction of the groove, and the connection portion extends in a depth direction of the groove and is c…
Who is the assignee on this patent?
Sanken Electric Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D12/481. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 12 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).