Semiconductor device having an insulated gate bipolar transistor

US9059237B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9059237-B2
Application numberUS-201314036637-A
CountryUS
Kind codeB2
Filing dateSep 25, 2013
Priority dateFeb 12, 2013
Publication dateJun 16, 2015
Grant dateJun 16, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A semiconductor device includes: a first semiconductor region; a second semiconductor region, which is arranged on the first semiconductor region; a third semiconductor region, which is arranged on the second semiconductor region; a plurality of fourth semiconductor regions, each of which is arranged with being spaced from each other on the third semiconductor region; a insulation film arranged on a inner wall of a recess, which extends from upper faces of the fourth semiconductor region to pass through the third semiconductor region and the fourth semiconductor region and reaches the second semiconductor region; a control electrode, a first main electrode, a second main electrode, which is electrically connected to the third semiconductor region and the fourth semiconductor region, wherein a ratio of a width of the recess to a width of the third semiconductor region abutting on the second main electrode is 1 or more.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a first semiconductor region, which has a first conductivity type; a second semiconductor region, which has a second conductivity type and is arranged on the first semiconductor region; a third semiconductor region, which has the first conductivity type and is arranged on the second semiconductor region; a plurality of fourth semiconductor regions, each of which has the second conductivity type and is spaced from each…

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What does patent US9059237B2 cover?
A semiconductor device includes: a first semiconductor region; a second semiconductor region, which is arranged on the first semiconductor region; a third semiconductor region, which is arranged on the second semiconductor region; a plurality of fourth semiconductor regions, each of which is arranged with being spaced from each other on the third semiconductor region; a insulation film arranged…
Who is the assignee on this patent?
Sanken Electric Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D12/038. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 16 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).