Open loop band gap reference voltage generator

Patent metadata

Field	Value
Publication number	US-9385689-B1
Application number	US-201514881176-A
Country	US
Kind code	B1
Filing date	Oct 13, 2015
Priority date	Oct 13, 2015
Publication date	Jul 5, 2016
Grant date	Jul 5, 2016

Abstract

A reference voltage generator that does not require a start-up circuit or a feedback loop generates a proportional-to-absolute-temperature (PTAT) output voltage based on two complementary-to-absolute-temperature (CTAT) currents. The reference voltage generator provides a reference voltage that is a sum of the PTAT output voltage and a CTAT voltage.

First claim

The invention claimed is:

1. A reference voltage generator for generating a reference voltage signal, comprising:
first and second resistors having first terminals connected to a supply voltage, and second terminals that output first and second complementary-to-absolute-temperature (CTAT) reference currents, respectively;
a first current mirror, connected between the second terminal of the first resistor and ground, that receives the first CTAT reference current and generates a first CTAT current;
a second current mirror, connected between the second terminal of the second resistor and ground, that receives the second CTAT reference current and generates a second CTAT current;
a third current mirror, connected between the supply voltage and the second current mirror, that receives the second CTAT current and generates a third CTAT current;
a fourth current mirror, connected between the first and third current mirrors and the supply voltage, that receives the first and third CTAT currents and generates a proportional-to-absolute-temperature (PTAT) output current;
a diode having a cathode connected to ground; and
a third resistor having a first terminal connected to the fourth current mirror for receiving the PTAT output current and a second terminal connected to an anode of the diode, wherein the reference voltage signal is output from the first terminal of the third resistor.

2. The reference voltage generator of claim 1 , wherein the first current mirror comprises:
a first transistor having a collector terminal connected to the second terminal of the first resistor for receiving the first CTAT reference current, a base terminal connected to its collector terminal, and an emitter terminal connected to ground; and
a second transistor having a base terminal connected to the base terminal of the first transistor, an emitter terminal connected to ground, and a collector terminal that generates the first CTAT current.

3. The reference voltage generator of claim 2 , wherein the second current mirror comprises:
a third transistor having a collector terminal connected to the second terminal of the second resistor for receiving the second CTAT reference current, a base terminal connected to its collector terminal, and an emitter terminal connected to ground; and
a fourth transistor having a base terminal connected to the base terminal of the third transistor, an emitter terminal connected to ground, and a collector terminal that generates the second CTAT current.

4. The reference voltage generator of claim 3 , wherein the third current mirror comprises:
a fifth transistor having a drain terminal connected to the collector terminal of the fourth transistor, a gate terminal connected to its drain terminal, and a source terminal connected to the supply voltage; and
a sixth transistor having a source terminal connected to the supply voltage, a gate terminal connected to the gate terminal of the fifth transistor, and a drain terminal that generates the third CTAT current.

5. The reference voltage generator of claim 4 , wherein the fourth current mirror comprises:
a seventh transistor having a drain terminal connected to the collector terminal of the second transistor and the drain terminal of the sixth transistor, a gate terminal connected to its drain terminal, and a source terminal connected to the supply voltage; and
an eighth transistor having a source terminal connected to the supply voltage, a gate terminal connected to the gate terminal of the seventh transistor, and a drain terminal that generates the PTAT output current.

6. The reference voltage generator of claim 5 , wherein:
the anode of the diode is directly connected to the fourth current mirror for receiving the PTAT output current, and the cathode is connected to ground; and
the third resistor comprises a pair of resistors connected in series with each other and in parallel with the diode, and the reference voltage signal is output from a node between the pair of resistors.

7. The reference voltage generator of claim 5 , wherein the first through fourth transistors are negative-positive-negative bipolar junction transistors and the fifth through eighth transistors are p-channel metal-oxide semiconductor transistors.

8. A reference voltage generator for generating a reference voltage signal, comprising:
first and second resistors having first terminals that receive a supply voltage and second terminals that output first and second complementary-to-absolute-temperature (CTAT) reference currents, respectively;
a first current mirror, connected between the second terminal of the first resistor and ground, that receives the first CTAT reference current and generates a first CTAT current;
a second current mirror, connected between the second terminal of the second resistor and ground, that receives the second CTAT reference current and generates a second CTAT current;
a third current mirror, connected between the voltage supply and the first current mirror, that receives the first CTAT current and generates a third CTAT current;
a fourth current mirror, connected between the supply voltage and the second current mirror, that receives the second CTAT current and generates fourth CTAT current;
a fifth current mirror, connected between the fourth current mirror and ground, that receives the fourth CTAT current and generates a fifth CTAT current;
a sixth current mirror connected to a first node between the third and fifth current mirrors, and to ground, and that receives a proportional-to-absolute-temperature (PTAT) reference current and generates an intermediate PTAT current;
a seventh current mirror, connected between the supply voltage and the sixth current mirror, that receives the intermediate PTAT current and generates a PTAT output current;
a diode having a cathode connected to ground; and
a third resistor having a first terminal connected to the seventh current mirror for receiving the PTAT output current and a second terminal connected to an anode of the diode, wherein the reference voltage signal is generated at a second node between the seventh current mirror and the third resistor.

9. The reference voltage generator of claim 8 , wherein:
the first current mirror comprises:
a first transistor having a collector connected to the second terminal of the first resistor for receiving the first CTAT reference current, a base connected to its collector, and an emitter connected to ground; and
a second transistor having a base connected to the base of the first transistor, an emitter connected to ground, and a collector that generates the first CTAT current; and

the second current mirror comprises:
a third transistor having a collector to the second terminal of the second resistor for receiving the second CTAT reference current, a base connected to its collector, and an emitter connected to ground; and

a fourth transistor having a base connected to the base of the third transistor, an emitter connected to ground, and a collector that generates the second CTAT current.

10. The reference voltage generator of claim 9 , wherein:
the third current mirror comprises:
a fifth transistor having a source connected to the supply voltage, a drain connected to the collector of the second transistor for receiving the first CTAT current, and a gate connected to its drain; and
a sixth transistor having a source connected to the supply voltage, a gate connected to the gate of the fifth transistor, and a drain that generates the third CTAT current; and

the fourth current mirror comprises:
a seventh transistor having a source connected to the supply voltage, a drain connected to the collector of the fourth transistor for receiving the second

Assignees

• Freescale Semiconductor Inc

Inventors

• Thakur Nishant Singh
• Mandal Pralay

Classifications

• G05F3/267

  using both bipolar and field-effect technology · CPC title

• H03K3/011 Primary

  Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature {(to maintain energy constant H03K3/015)} · CPC title

• G05F3/30 Primary

  Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities (G05F3/26 takes precedence) · CPC title

• H03K3/02335

  provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails (digital storage cells each combining volatile and non-volatile storage properties G11C14/00) · CPC title

• H03K17/223

  in field-effect transistor switches · CPC title