Method of manufacturing semiconductor chips

US9385268B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9385268-B2
Application numberUS-201514877592-A
CountryUS
Kind codeB2
Filing dateOct 7, 2015
Priority dateNov 10, 2014
Publication dateJul 5, 2016
Grant dateJul 5, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of manufacturing semiconductor chips includes: forming grooves on a front face side of a substrate; and forming grooves on a back face side of the substrate as defined herein, and in manufacturing conditions in which a variation range of a top section of the cutting member having a tapered tip end shape with no top face in the groove width direction changes from a range included in the groove on the front face side to a range away from the groove on the front face side as wear of the cutting member advances, the use of the cutting member is stopped before the variation range changes from the range included in the groove on the front face side to the range away from the groove on the front face side.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing semiconductor chips comprising: forming grooves on a front face side of a substrate; and forming grooves on a back face side of the substrate communicating with the grooves on the front face side using a rotating cutting member having a thickness thicker than width of inlet portions of the grooves on the front face side from the back face side of the substrate and dicing the substrate into semiconductor chips, wherein in manufacturing conditions in which a variation range of a top section of the cutting member having a tapered tip end shape with no top face in the groove width direction changes from a range included in the groove on the front face side to a range away from the groove on the front face side as wear of the cutting member advances, the use of the cutting member is stopped before the variation range changes from the range included in the groove on the front face side to the range away from the groove on the front face side. 2. The method of manufacturing semiconductor chips according to claim 1 , wherein the use of the cutting member is stopped based on a predetermined relationship between use amount of the cutting member and rate of breakage at the periphery of the groove on the front face side. 3. A method of manufacturing semiconductor chips comprising: forming grooves on a front face side of a substrate; and forming grooves on a back face side of the substrate communicating with the grooves on the front face side using a rotating cutting member having a thickness thicker than width of inlet portions of the grooves on the front face side from the back face side of the substrate and dicing the substrate into semiconductor chips, wherein in manufacturing conditions in which a variation range of a top section of the cutting member having a tapered tip end shape with no top face in the groove width direction changes from a range included in the groove on the front face side to a range away from the groove on the front face side as wear of the cutting member advances, the use of the cutting member is stopped before the tip end shape of the cutting member is formed into a tapered shape in which a maximum stress is applied at a region of the top section and periphery of the groove on the front face side is broken due to the wear of the cutting member. 4. The method of manufacturing semiconductor chips according to claim 3 , wherein the use of the cutting member is stopped based on a predetermined relationship between use amount of the cutting member and rate of breakage at the periphery of the groove on the front face side. 5. A method of manufacturing semiconductor chips comprising: forming grooves on a front face side of a substrate; and forming grooves on a back face side of the substrate communicating with the grooves on the front face side using a rotating cutting member having a thickness thicker than width of inlet portions of the grooves on the front face side from the back face side of the substrate and dicing the substrate into semiconductor chips, wherein in manufacturing conditions in which a variation range of a thickness direction center of a tip end section of the cutting member becomes away from the groove on the front face side and periphery of the groove on the front face side is broken by a stress from a region of a top section of the cutting member that has been tapered due to wear, the use of the cutting member is stopped before rate of breakage of the periphery of the groove on the front face side starts rising as the wear of the cutting member advances. 6. The method of manufacturing semiconductor chips according to claim 5 , wherein the use of the cutting member is stopped based on a predetermined relationship between use amount of the cutting member and rate of breakage at the periphery of the groove on the front face side.

Assignees

Inventors

Classifications

  • H10P54/00Primary

    Cutting or separating of wafers, substrates or parts of devices · CPC title

  • H10H20/01Primary

    Manufacture or treatment · CPC title

  • Electricity · mapped topic

  • by cutting with discs or wheels · CPC title

  • with a plurality of cutting blades · CPC title

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What does patent US9385268B2 cover?
A method of manufacturing semiconductor chips includes: forming grooves on a front face side of a substrate; and forming grooves on a back face side of the substrate as defined herein, and in manufacturing conditions in which a variation range of a top section of the cutting member having a tapered tip end shape with no top face in the groove width direction changes from a range included in the…
Who is the assignee on this patent?
Fuji Xerox Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P54/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).