Method for Manufacturing a Field Effect Transistor of a Non-Planar Type
US-2015111351-A1 · Apr 23, 2015 · US
US9385191B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9385191-B2 |
| Application number | US-201414549523-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 20, 2014 |
| Priority date | Nov 20, 2014 |
| Publication date | Jul 5, 2016 |
| Grant date | Jul 5, 2016 |
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A FINFET structure is provided. The FINFET structure includes a substrate, a PMOS element, a NMOS element, a STI structure, and a bump structure. The substrate includes a first area and a second area adjacent to the first area. The PMOS element is disposed in the first area of the substrate, and includes at least one first fin structure. The NMOS element is disposed in the second area of the substrate and includes at least one second fin structure. The STI structure is disposed between the first fin structure and the second fin structure. The bump structure is disposed on the STI structure and has a carbon-containing dielectric material.
Opening claim text (preview).
What is claimed is: 1. A FINFET structure, comprising: a substrate, including a first area and a second area adjacent to the first area; a PMOS element, disposed in the first area of the substrate, and including at least one first fin structure; a NMOS element, disposed in the second area of the substrate, and including at least one second fin structure; a STI structure, disposed between the first fin structure and the second fin structure, wherein the STI structure has a bumped part, and the bumped part has a top surface and a side wall; and a bump structure, disposed on the STI structure and covering only and entirely the top surface of the bumped part of the STI structure, wherein the bump structure is of a single material and the single material is a carbon-containing dielectric material. 2. The FINFET structure according to claim 1 , wherein the second fin structure has a second top layer of epitaxial SiGe. 3. The FINFET structure according to claim 1 , wherein the PMOS element further includes a first gate structure formed on the first fin structure. 4. The FINFET structure according to claim 1 , wherein the NMOS element further includes a second gate structure formed on the second fin structure. 5. The FINFET structure according to claim 1 , wherein the carbon-containing dielectric material is SiCN.
comprising FinFETs · CPC title
the components including FinFETs · CPC title
Manufacturing their channels · CPC title
using silicon technology, e.g. SiGe · CPC title
having non-uniform gate electrodes, e.g. gate conductors having varying doping · CPC title
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