FINFET structure

US9385191B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9385191-B2
Application numberUS-201414549523-A
CountryUS
Kind codeB2
Filing dateNov 20, 2014
Priority dateNov 20, 2014
Publication dateJul 5, 2016
Grant dateJul 5, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A FINFET structure is provided. The FINFET structure includes a substrate, a PMOS element, a NMOS element, a STI structure, and a bump structure. The substrate includes a first area and a second area adjacent to the first area. The PMOS element is disposed in the first area of the substrate, and includes at least one first fin structure. The NMOS element is disposed in the second area of the substrate and includes at least one second fin structure. The STI structure is disposed between the first fin structure and the second fin structure. The bump structure is disposed on the STI structure and has a carbon-containing dielectric material.

First claim

Opening claim text (preview).

What is claimed is: 1. A FINFET structure, comprising: a substrate, including a first area and a second area adjacent to the first area; a PMOS element, disposed in the first area of the substrate, and including at least one first fin structure; a NMOS element, disposed in the second area of the substrate, and including at least one second fin structure; a STI structure, disposed between the first fin structure and the second fin structure, wherein the STI structure has a bumped part, and the bumped part has a top surface and a side wall; and a bump structure, disposed on the STI structure and covering only and entirely the top surface of the bumped part of the STI structure, wherein the bump structure is of a single material and the single material is a carbon-containing dielectric material. 2. The FINFET structure according to claim 1 , wherein the second fin structure has a second top layer of epitaxial SiGe. 3. The FINFET structure according to claim 1 , wherein the PMOS element further includes a first gate structure formed on the first fin structure. 4. The FINFET structure according to claim 1 , wherein the NMOS element further includes a second gate structure formed on the second fin structure. 5. The FINFET structure according to claim 1 , wherein the carbon-containing dielectric material is SiCN.

Assignees

Inventors

Classifications

  • H10D84/853Primary

    comprising FinFETs · CPC title

  • the components including FinFETs · CPC title

  • Manufacturing their channels · CPC title

  • using silicon technology, e.g. SiGe · CPC title

  • having non-uniform gate electrodes, e.g. gate conductors having varying doping · CPC title

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Frequently asked questions

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What does patent US9385191B2 cover?
A FINFET structure is provided. The FINFET structure includes a substrate, a PMOS element, a NMOS element, a STI structure, and a bump structure. The substrate includes a first area and a second area adjacent to the first area. The PMOS element is disposed in the first area of the substrate, and includes at least one first fin structure. The NMOS element is disposed in the second area of the su…
Who is the assignee on this patent?
United Microelectronics Corp
What technology area does this patent fall under?
Primary CPC classification H10D84/853. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).