High breakdown N-type buried layer

US9385187B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9385187-B2
Application numberUS-201414555330-A
CountryUS
Kind codeB2
Filing dateNov 26, 2014
Priority dateApr 25, 2014
Publication dateJul 5, 2016
Grant dateJul 5, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device has an n-type buried layer formed by implanting antimony and/or arsenic into the p-type first epitaxial layer at a high dose and low energy, and implanting phosphorus at a low dose and high energy. A thermal drive process diffuses and activates both the heavy dopants and the phosphorus. The antimony and arsenic do not diffuse significantly, maintaining a narrow profile for a main layer of the buried layer. The phosphorus diffuses to provide a lightly-doped layer several microns thick below the main layer. An epitaxial p-type layer is grown over the buried layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of forming a semiconductor device, comprising the steps: providing a first epitaxial layer of a substrate comprising p-type semiconductor material; implanting first n-type dopants into the substrate at a first dose to form a first implantation layer; implanting second n-type dopants into the substrate at a second dose less than the first dose and at an energy above 100 keV to form a second implementation layer; and heating the substrate in a first thermal drive process at a temperature of 1150° C. to 1225° C. for at least 30 minutes to define a p-type epitaxial layer in the substrate and form an n-type buried layer positioned above the p-type epitaxial layer, the n-type buried layer including: a main layer having a first doping concentration and a buried top surface below a top surface of the substrate; and a lightly-doped layer positioned above the p-type epitaxial layer and below the main layer, the lightly-doped layer having a second doping concentration lower than the first doping concentration. 2. The method of claim 1 , wherein the p-type semiconductor material in the first p-type epitaxial layer has a resistivity of 5 ohm-cm to 10 ohm-cm. 3. The method of claim 1 , wherein the first n-type dopants include antimony and are implanted at the first dose greater than 5×10 14 cm −2 . 4. The method of claim 1 , wherein the first n-type dopants include phosphorus and are implanted into across the substrate. 5. The method of claim 1 , wherein the first n-type dopants include phosphorus and are implanted into the substrate through areas exposed by an implant mask so that the n-type buried layer includes a localized n-type buried layer. 6. The method of claim 1 , further comprising heating the substrate in a second thermal drive process at a second temperature of 1125° C. to 1200° C. for at least 120 minutes after the first p-type epitaxial layer is defined. 7. The method of claim 1 , further comprising forming a deep trench in the substrate extending from the top surface of the substrate through the n-type buried layer to reach the first p-type epitaxial layer without penetrating through the substrate, and forming a dielectric liner coating a bottom portion of the deep trench and contacting the substrate. 8. The method of claim 7 , wherein the deep trench has a closed-loop configuration defined on the top surface of the substrate. 9. The method of claim 7 , further comprising implanting third n-type dopants into the substrate adjacent to the deep trench after the deep trench is formed so as to form n-type self-aligned sinkers in the substrate to abutting the buried top surface of the n-type buried layer. 10. The method of claim 1 , further comprising forming an n-type sinker in the substrate extending to the buried top surface of the n-type buried layer, the n-type sinker having a closed-loop configuration.

Assignees

Inventors

Classifications

  • Thermal treatments, e.g. annealing or sintering · CPC title

  • by ion implantation · CPC title

  • being group IV material · CPC title

  • Through-implantation · CPC title

  • into Group IV semiconductors · CPC title

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What does patent US9385187B2 cover?
A semiconductor device has an n-type buried layer formed by implanting antimony and/or arsenic into the p-type first epitaxial layer at a high dose and low energy, and implanting phosphorus at a low dose and high energy. A thermal drive process diffuses and activates both the heavy dopants and the phosphorus. The antimony and arsenic do not diffuse significantly, maintaining a narrow profile fo…
Who is the assignee on this patent?
Texas Instruments Inc
What technology area does this patent fall under?
Primary CPC classification H10D62/107. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).