Heterojunction field effect transistor (HFET) variable gain amplifier having variable transconductance

Patent metadata

Field	Value
Publication number	US-9379228-B2
Application number	US-201414548646-A
Country	US
Kind code	B2
Filing date	Nov 20, 2014
Priority date	Nov 20, 2014
Publication date	Jun 28, 2016
Grant date	Jun 28, 2016

Abstract

A heterojunction semiconductor field effect transistor HFET having a pair of layers of different semiconductor materials forming a quantum well within the structure to support the 2DEG. Source, drain and gate electrodes are disposed above the channel. The HFET has a predetermined transconductance. A transconductance control electrode varies an electric field within the structure under the channel to vary the shape of the quantum well and thereby the transconductance of the FET in accordance with a variable control signal fed to the transconductance control electrode.

First claim

What is claimed is:

1. A heterojunction semiconductor field effect transistor (FET) comprising: a structure having a pair of layers of different semiconductor materials forming a quantum well within the structure to support a two-dimensional electron gas (2DEG); source, drain and gate electrodes above the 2DEG with the FET having a predetermined transconductance; and a transconductance control electrode for varying an electric field within the structure under the 2DEG to vary the shape of the quantum well and thereby the transconductance of the FET in accordance with a variable control signal fed to the transconductance control electrode.

2. A Field Effect Transistor (FET), comprising:
a source electrode in ohmic contact with a first portion of a surface of a heterojunction semiconductor structure having a pair of layers of different semiconductor materials forming a quantum well within the structure to support a two-dimensional electron gas (2DEG);
a drain electrode in ohmic contact with a second portion of the surface of the structure;
a gate electrode in Schottky contact with a third portion of the surface of the structure disposed between the first portion and the second portion for controlling a flow of carriers between the source contact and the drain contact as such carriers pass through the 2DEG;
wherein the source electrode, drain electrode and gate electrodes are disposed above the 2DEG on a first one of the pair of layers; and
a fourth electrode for varying an electric field within the structure to vary the shape of the quantum well in accordance with a variable control signal fed to the fourth electrode, the variable control signal being independent of a voltage applied to the gate electrode.

3. A Field Effect Transistor (FET) comprising:
a source electrode in ohmic contact with a first portion of a surface of a heterojunction semiconductor structure having a pair of layers of different semiconductor materials forming a quantum well within the structure to support a two-dimensional electron gas (2DEG);
a drain electrode in ohmic contact with a second portion of the surface of the structure;
a gate contact in Schottky contact with a third portion of the surface of the structure disposed between the first portion and the second portion for controlling a flow of carriers between the source contact and the drain contact as such carriers pass through the 2DEG;
wherein the source electrode, drain electrode and gate electrodes are disposed above the 2DEG on a first one of the pair of layers;
wherein the FET has a predetermined transconductance; and
a transconductance control electrode is provided for varying an electric field within the structure to vary the shape of the quantum well and thereby the transconductance of the FET in accordance with a variable control signal fed to the transconductance control electrode, the variable control signal being independent of a voltage applied to the gate electrode.

4. The FET recited in claim 3 wherein the transconductance control electrode is disposed in the second one of the pair of layers for varying the electric field within the structure.

5. The FET recited in claim 3 wherein the transconductance control electrode is disposed in a region of the second one of the pair of layers in the structure under the 2DEG for varying the electric field within a region.

6. The FET recited in claim 3 including an insulating layer disposed between the transconductance control electrode and the region of the second one of the pair of layers in the structure under the 2DEG.

7. The FET recited in claim 3 wherein the transconductance control electrode is in ohmic contact with the region of the second one of the pair of layers in the structure under the 2DEG.

8. The FET recited in claim 3 wherein the transconductance control electrode is in Schottky contact with the region of the second one of the pair of layers in the structure under the 2DEG.

9. A field effect transistor, comprising:
a heterojunction semiconductor structure having a pair of layers of different semiconductor materials forming a quantum well within the heterojunction semiconductor to support a two-dimensional electron gas (2DEG);
a source electrode in ohmic contact with a first portion of a surface of a first one of the pair of layers above the 2DEG;
a drain electrode in ohmic contact with a second portion of the surface of the first one of the pair of layers;
a gate electrode in Schottky contact with a third portion of the surface of the first one of the pair of layers, the third portion being disposed between the first portion and the second portion for controlling a flow of carriers between the source contact and the drain contact as such carriers pass through the 2DEG;
wherein the field effect transistor has a predetermined transconductance; and
a transconductance control electrode disposed in the second one of the pair of layers for varying an electric field within the heterojunction semiconductor structure under the 2DEG to vary the shape of the quantum well and thereby the transconductance of the transistor in accordance with a variable control signal fed to the transconductance control electrode.

10. A heterojunction field effect transistor, comprising:
a heterojunction semiconductor structure having a pair of layers of different semiconductor materials forming a quantum well within the heterojunction semiconductor structure to support a two-dimensional electron gas (2DEG), such structure having a predetermined nominal transconductance;
a source electrode in ohmic contact with a first portion of a surface of a semiconductor;
a drain electrode in ohmic contact with a second portion of the surface of the semiconductor structure;
a gate electrode in Schottky contact with a third portion of the surface of the structure, the third portion being disposed between the first portion and the second portion for controlling a flow of carriers between the source contact and the drain contact as such carriers pass through the 2DEG; and
wherein the source electrode, drain electrode and gate electrode are in contact with a first one of the pair of layers, source electrode, drain electrode and gate electrode being disposed above the 2DEG;
a transconductance control electrode disposed in a second one of the pair of layers, for varying an electric field within the semiconductor under the 2DEG to vary the shape of the quantum well and thereby the transconductance of the transistor in accordance with a variable control signal fed to the transconductance control electrode.

11. A system, comprising:
(A) a heterojunction field effect transistor structure, comprising:
a heterojunction semiconductor structure having a pair of different semiconductor layers forming a quantum well within the heterojunction semiconductor structure to support a two-dimensional electron gas (2DEG), such structure having a predetermined nominal transconductance;
a source electrode in ohmic contact with a first portion of a surface of a semiconductor;
a drain electrode in ohmic contact with a second portion of the surface of the semiconductor structure;
a gate electrode in Schottky contact with a third portion of the surface of the structure, the third portion being disposed between the first portion and the second portion for controlling a flow of carriers between the source contact and the drain contact as such carriers pass through the 2DEG;
wherein the source electrode, drain electrode and gate electrode are in contact with a first one of the pair of layers, source electrode, drain electrode and gate electrode being disposed above the 2DEG;
a transconductance control electrode for varying an electric field wit

Assignees

• Raytheon Co

Inventors

• Saunders Jeffrey
• Reza Shahed
• Chumbes Eduardo M

Classifications

• H10D62/8503

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title

• H10D64/513

  within recesses in the substrate, e.g. trench gates, groove gates or buried gates · CPC title

• H10D64/512

  Disposition of the gate electrodes, e.g. buried gates · CPC title

• H10D64/27 Primary

  Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates · CPC title

• H10D62/161

  of FETs having Schottky gates · CPC title