Display device capable of detecting bonding defect

US9377635B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9377635-B2
Application numberUS-201314011963-A
CountryUS
Kind codeB2
Filing dateAug 28, 2013
Priority dateDec 27, 2012
Publication dateJun 28, 2016
Grant dateJun 28, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A disclosed display device capable of detecting bonding defects includes: a display panel having an active area used to display images and a pad area in which pads are formed; driver IC (Integrated Circuit) chip mounted on a pad region of the display panel; a flexible printed circuit board bonded to the pad region of the display panel; and a bonding resistance detection circuit disposed in the driver IC chip. The display panel includes: first and second bonding portions formed in a mounting region of the driver IC chip within the pad area of the display panel; and third and fourth bonding portions formed in a bonding region of the flexible printed circuit board within the pad area of the display panel. The first through fourth bonding portions are electrically connected to one another, and the first and second bonding portions are connected to the bonding resistance detection circuit.

First claim

Opening claim text (preview).

What is claimed is: 1. A display device, comprising: a display panel having an active area used to display images and a pad area in which pads are formed; a driver IC (Integrated Circuit) chip mounted on the pad area of the display panel, the driver IC including a bonding resistance detection circuit; and a flexible printed circuit board bonded to the pad area of the display panel, wherein the display panel includes: first and second bonding portions formed in a mounting region of the driver IC chip within the pad area of the display panel; and third and fourth bonding portions formed in a bonding region of the flexible printed circuit board within the pad area of the display panel, wherein the first through the fourth bonding portions are electrically connected to one another, and the first and the second bonding portions are connected to the bonding resistance detection circuit, and wherein the bonding resistance detection circuit includes a detector having: a first bumper connected to the first bonding portion; a second bumper connected to the second bonding portion; a reference resistor connected to the second bumper; and a reference voltage supplier commonly connected to the first bumper and to the reference resistor. 2. The display device of claim 1 , wherein the bonding resistance detection circuit further includes: a detector configured to detect an amount of current flowing through the reference resistor; a converter configured to convert the detected current amount into a digital data; and a register configured to store the converted digital data. 3. The display device of claim 2 , wherein the amount of current flowing through the reference resistor varies according to whether at least one of the driver IC chip and the flexible printed circuit board is defectively bonded to the pad area of the display panel. 4. The display device of claim 3 , wherein the amount of current becomes larger when at least one of the driver IC chip and the flexible printed circuit board is defectively bonded to the pad area of the display panel. 5. The display device of claim 1 , wherein the detector further includes a ground voltage line connected to a connection node between the second bumper and the reference resistor. 6. The display device of claim 1 , wherein the third and the fourth bonding portions are connected to each other by a connection pattern formed on the flexible printed circuit board. 7. The display device of claim 1 , wherein the display panel is one of a liquid crystal display panel, an organic light emitting display panel and an electronic ink (E-Ink) film. 8. A display device, comprising: a display panel having a pad area and an active area configured to display images; a driver IC (Integrated Circuit) chip bonded to the pad area of the display panel to form at least first and second bonding portions in the pad area of the display panel, the driver IC chip having a bonding resistance detection circuit; a flexible printed circuit board bonded to the pad area of the display panel to form at least third and fourth bonding portions in the pad area of the display panel, wherein the first through the fourth bonding portions are electrically connected to one another, wherein the bonding resistance detection circuit includes a detector having a reference resistor electrically connected to the first and the second bonding portions, and wherein the detector is configured to detect an amount of current flowing through the reference resistor. 9. The display device of claim 8 , wherein the driver IC chip further includes: a converter configured to convert the detected amount of current into a digital current data; and a register configured to store the digital current data. 10. The display device of claim 8 , wherein the detected amount of current is configured to vary based on whether there is a bonding defect in at least one of the first through the fourth bonding portions. 11. The display device of claim 10 , wherein the detected amount of current is configured to be greater when there is a bonding defect in at least one of the first through the fourth bonding portions than when there is no bonding defect. 12. The display device of claim 8 , wherein the detector further includes: a first bumper connected to the first bonding portion; a second bumper connected between the second bonding portion and the reference resistor; and a reference voltage supplier commonly connected to the first bumper and to the reference resistor. 13. The display device of claim 12 , wherein the detector further includes a ground voltage line connected to a connection node between the second bumper and the reference resistor. 14. The display device of claim 8 , wherein the third and the fourth bonding portions are electrically connected to each other by a connection pattern formed on the flexible printed circuit board. 15. The display device of claim 14 , wherein the flexible printed circuit board includes a first pad connected to the third bonding portion and a second pad connected to the fourth bonding portion, and wherein the connection pattern is connected to the first pad and to the second pad. 16. The display device of claim 8 , wherein the first through the fourth bonding portions are connected to each other in series, and wherein the first through the fourth bonding portions are connected to the reference resistor in parallel. 17. The display device of claim 8 , wherein the display panel is one of a liquid crystal display panel, an organic light emitting display panel, and an electronic ink film.

Assignees

Inventors

Classifications

  • G02F1/1309Primary

    Repairing; Testing · CPC title

  • Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements (in which the variable information is permanently attached to a movable support G09F11/00; abacus G06C1/00; slide-rules G06G1/00) · CPC title

  • Electrode terminals · CPC title

  • G02F1/1345Primary

    Conductors connecting electrodes to cell terminals · CPC title

  • based on liquid crystals, e.g. single liquid crystal display cells · CPC title

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What does patent US9377635B2 cover?
A disclosed display device capable of detecting bonding defects includes: a display panel having an active area used to display images and a pad area in which pads are formed; driver IC (Integrated Circuit) chip mounted on a pad region of the display panel; a flexible printed circuit board bonded to the pad region of the display panel; and a bonding resistance detection circuit disposed in the …
Who is the assignee on this patent?
Lg Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/1309. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 28 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).