Semiconductor processing with DC assisted RF power for improved control

Patent metadata

Field	Value
Publication number	US-9373517-B2
Application number	US-201313829669-A
Country	US
Kind code	B2
Filing date	Mar 14, 2013
Priority date	Aug 2, 2012
Publication date	Jun 21, 2016
Grant date	Jun 21, 2016

Abstract

Semiconductor processing systems are described including a process chamber. The process chamber may include a lid assembly, grid electrode, conductive insert, and ground electrode. Each component may be coupled with one or more power supplies operable to produce a plasma within the process chamber. Each component may be electrically isolated through the positioning of a plurality of insulation members. The one or more power supplies may be electrically coupled with the process chamber with the use of switching mechanisms. The switches may be switchable to electrically couple the one or more power supplies to the components of the process chamber.

First claim

What is claimed is:

1. A semiconductor processing system comprising:
a processing chamber that includes:
a lid assembly defining a precursor inlet through which precursor species may be delivered;
a ground electrode;
a grid electrode disposed between the lid assembly and the ground electrode, and defining a first plasma region within the chamber between the grid electrode and the lid assembly and a second plasma region within the chamber between the grid electrode and the ground electrode;
an annular conductive insert coupled within and defining a portion of a sidewall of the processing chamber between the lid assembly and the grid electrode at a periphery of the first plasma region;
a first insulation member positioned to electrically isolate the grid electrode from the conductive insert;
a second insulation member positioned to electrically isolate the lid assembly from the conductive insert, wherein at least one of the first and second insulation members comprises a portion of the sidewall of the processing chamber;

a first power supply electrically coupled with the lid assembly; and
a second power supply electrically coupled with at least one of the lid assembly, the grid electrode, or the conductive insert.

2. The semiconductor processing system of claim 1 , further comprising a first switch that is electrically coupled with the second power supply, and that is switchable to electrically couple the second power supply to one of the lid assembly, the grid electrode, or the conductive insert.

3. The semiconductor processing system of claim 2 , further comprising a second switch that is switchable to electrically couple at least two of the lid assembly, the ground electrode, or the grid electrode.

4. The semiconductor processing system of claim 3 , wherein the first switch is switched to electrically couple the second power supply with the conductive insert, and wherein the second switch is switched to electrically couple the grid electrode and the ground electrode.

5. The semiconductor processing system of claim 4 , wherein the second power supply is configured to deliver a negative voltage to the conductive insert, and wherein the first power supply is configured to ignite a plasma in the first plasma region where electron flux is directed to the grid electrode.

6. The semiconductor processing system of claim 4 , wherein the second power supply is configured to deliver a positive voltage to the conductive insert, and wherein the first power supply is configured to ignite a plasma in the first plasma region where ion flux is directed to the grid electrode.

7. The semiconductor processing system of claim 3 , wherein the first switch is switched to electrically couple the second power supply with the lid assembly such that both the first and second power supplies are electrically coupled with the lid assembly, and wherein the second switch is switched to electrically couple the grid electrode and the ground electrode.

8. The semiconductor processing system of claim 7 , wherein the second power supply is configured to provide constant voltage to the lid assembly, and the first power supply is configured to provide pulsed frequency power to the lid assembly.

9. The semiconductor processing system of claim 3 , wherein the first switch is switched to electrically couple the second power supply with the lid assembly such that both the first and second power supplies are electrically coupled with the lid assembly, and wherein the second switch is switched to electrically couple the grid electrode and the lid assembly.

10. The semiconductor processing system of claim 9 , wherein the second power supply is configured to provide constant voltage to the lid assembly, and the first power supply is configured to provide pulsed frequency power to the lid assembly.

11. The semiconductor processing system of claim 3 , wherein the first switch is switched to electrically couple the second power supply with the grid electrode.

12. The semiconductor processing system of claim 11 , wherein the second power supply is configured to provide constant voltage to the grid electrode, and the first power supply is configured to provide pulsed frequency power to the lid assembly.

13. The semiconductor processing system of claim 1 , wherein the first power supply is an RF power supply, and the second power supply is a DC power supply.

14. The semiconductor processing system of claim 1 , wherein the ground electrode is disposed in the sidewall of the processing chamber between the grid electrode and a substrate support.

15. The semiconductor processing system of claim 1 , wherein the second insulation member comprises an annular insulation member disposed within the sidewall of the processing chamber between the conductive insert and the lid assembly.

16. The semiconductor processing system of claim 13 , wherein the second power supply is also coupled with the lid assembly.

17. A semiconductor processing system comprising:
a processing chamber that includes:
a lid assembly defining a precursor inlet through which precursor species may be delivered;
a ground electrode;
a plurality of sidewall members positioned between the lid assembly and ground electrode that define the processing chamber sidewall, the plurality of sidewall members comprising:
a grid electrode;
three annular members coupled in a stacked arrangement and positioned within the sidewalls of the processing chamber between the lid assembly and the grid electrode, wherein the three annular members are characterized by substantially equivalent inner and outer radial dimensions, the three annular members comprising:
a first insulation member in contact with the lid assembly
an annular conductive insert in contact with the first insulation member;
a second insulation member in contact with the grid electrode and annular conductive insert, wherein the first and second insulation members electrically isolate the annular conductive insert from the lid assembly and other portions of the processing chamber sidewall;

a first power supply electrically coupled with the lid assembly; and
a second power supply electrically coupled with at least one of the lid assembly, the grid electrode, or the conductive insert.

18. The semiconductor processing system of claim 17 , wherein the second insulation member comprises an annular ceramic plate.

19. A semiconductor processing system comprising:
a processing chamber that includes:
a lid assembly defining a precursor inlet through which precursor species may be delivered;
a ground electrode comprising a component of a sidewall of the processing chamber;
a plurality of sidewall members positioned between the lid assembly and ground electrode that each at least partially define the processing chamber sidewall, the plurality of sidewall members comprising:
a grid electrode;
a first annular insulation member disposed between the grid electrode and ground electrode;
an annular conductive insert disposed between the lid assembly and grid electrode;
a second insulation member comprising an annular ceramic plate disposed between the lid assembly and annular conductive insert;
a third insulation member comprising an annular ceramic plate disposed between the annular conductive insert and the grid electrode;

a first power supply electrically coupled with the lid assembly; and
a second power supply electrically coupled with at least one of the lid assembly, the grid electrode, or the conductive insert.

20. The semiconductor pr

Assignees

• Applied Materials Inc

Inventors

• Yang Jang-Gyoo
• Chen Xinglong
• Park Soonam
• Baek Jonghoon
• Garg Saurabh
• Venkataraman Shankar

Classifications

• H10P50/287

  by chemical means · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P50/267

  using plasmas · CPC title

• H10P14/6336

  in the presence of a plasma [PECVD] · CPC title

• H10P14/43

  Chemical deposition, e.g. chemical vapour deposition [CVD] · CPC title