Silicon etching method

Patent metadata

Field	Value
Publication number	US-9371224-B2
Application number	US-201314411931-A
Country	US
Kind code	B2
Filing date	Sep 3, 2013
Priority date	Sep 18, 2012
Publication date	Jun 21, 2016
Grant date	Jun 21, 2016

Abstract

A silicon etching method of etching a silicon substrate to form silicon trenches having different width dimensions includes: S 1 , providing a silicon substrate; S 2 , depositing a mask layer on the silicon substrate; S 3 , corroding the mask layer to form windows having different width dimensions, wherein a mask layer having a certain thickness is reserved at least at a bottom portion of a window having a non-minimum width dimension, such that all the silicon trenches have the same depth after step S 4 ; and S 4 , corroding the mask layer at the bottom portion of the window and the silicon substrate to form the silicon trenches. The mask layer having a certain thickness is reserved at the bottom portion of the window having the non-minimum width dimension, a relatively large window is protected, and a relatively small window is etched first, so that the finally obtained silicon trenches have the same depth.

First claim

What is claimed is:

1. A silicon etching method of etching a silicon substrate to form silicon trenches having different width dimensions, comprising:
S 1 , providing a silicon substrate;
S 2 , depositing a mask layer on the silicon substrate;
S 3 , corroding the mask layer to form windows in the mask layer having different width dimensions, wherein a mask layer having a certain thickness is reserved at least at a bottom portion of a window having a non-minimum width dimension, such that all the silicon trenches have the same depth after step S 4 ; and
S 4 , corroding the mask layer at the bottom portion of the window and the silicon substrate to form the silicon trenches;
wherein in the step S 3 , the mask layers having certain thicknesses are reserved at the bottom portions of all the windows, and the larger the size of the window is, the thicker the mask layer is reserved at the bottom portion of the window;
wherein the relationship between a size of the window and a corrosion rate of the silicon substrate is defined by:
T SiO2 =( D 1 − D 2 ) *E SiO2 / E Si

 where T SiO2 is a thickness of the silicon dioxide, D 1 and D 2 are the depths of the silicon trenches, E SiO2 is the corrosion rate of the silicon dioxide, and E Si is the corrosion rate of the silicon substrate.

2. The silicon etching method according to claim 1 , wherein the mask layer is made of silicon dioxide, silicon nitride or photoresist.

3. The silicon etching method according to claim 1 , wherein in the step S 4 , the mask layer at the bottom portion of the window and the silicon substrate are corroded using a deep reactive ion etching method.

4. The silicon etching method according to claim 1 , wherein in the step S 4 , the mask layer at the bottom portion of the window and the silicon substrate are corroded using a fluorine-based gas.

5. The silicon etching method according to claim 4 , wherein prior to the step S 1 , the method further comprises: cleaning the silicon substrate.

6. The silicon etching method according to claim 5 , wherein the silicon substrate is cleaned using an RCA standard cleaning method.

7. The silicon etching method according to claim 1 , wherein in the step S 4 , the mask layer at the bottom portion of the window and the silicon substrate are corroded using a chlorine-based gas.

8. The silicon etching method according to claim 7 , wherein prior to the step S 1 , the method further comprises: cleaning the silicon substrate.

9. The silicon etching method according to claim 8 , wherein the silicon substrate is cleaned using an RCA standard cleaning method.

10. The silicon etching method according to claim 1 , wherein prior to the step S 1 , the method further comprises: cleaning the silicon substrate.

11. The silicon etching method according to claim 10 , wherein the silicon substrate is cleaned using an RCA standard cleaning method.

12. The silicon etching method according to claim 1 , wherein in the step S 3 , the silicon substrate at the bottom portion of a minimum window is exposed, and the mask layers having certain thicknesses are reserved at the bottom portion of all the other windows, and the larger the window is, the thicker the mask layer is reserved at the bottom portion of the window.

Assignees

• Csmc Technologies Fab1 Co Ltd

Inventors

• Su Jiale

Classifications

• H10P50/695 Primary

  characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

• B81C1/00626

  Processes for achieving a desired geometry not provided for in groups B81C1/00563 - B81C1/00619 · CPC title

• B81B2203/033

  Trenches · CPC title

• B81C1/00396 Primary

  Mask characterised by its composition, e.g. multilayer masks · CPC title

• H01L21/3086

  Electricity · mapped topic