Methods of manufacturing trench semiconductor devices with edge termination structures

Patent metadata

Field	Value
Publication number	US-9368576-B2
Application number	US-201213612231-A
Country	US
Kind code	B2
Filing date	Sep 12, 2012
Priority date	May 17, 2012
Publication date	Jun 14, 2016
Grant date	Jun 14, 2016

Abstract

Embodiments of semiconductor devices and methods of their formation include providing a semiconductor substrate having a top surface, a bottom surface, an active region, and an edge region, and forming a gate structure in a first trench in the active region of the semiconductor substrate. A termination structure is formed in a second trench in the edge region of the semiconductor substrate. The termination structure has an active region facing side and a device perimeter facing side. The method further includes forming first and second source regions of the first conductivity type are formed in the semiconductor substrate adjacent both sides of the gate structure. A third source region is formed in the semiconductor substrate adjacent the active region facing side of the termination structure. The semiconductor device may be a trench metal oxide semiconductor device, for example.

First claim

What is claimed is:

1. A method for forming a semiconductor device, comprising:
providing a semiconductor substrate having a top surface, a bottom surface, an active region, and an edge region;
forming a gate structure in a first trench in the active region of the semiconductor substrate, wherein the gate structure has a first side and a second side, and the gate structure includes a gate electrode and a gate oxide between the gate electrode and the semiconductor substrate;
forming a termination structure in a second trench in the edge region of the semiconductor substrate, wherein the termination structure has an active region facing side and a device perimeter facing side, the second trench is partially defined by a sidewall at the active region facing side of the termination structure, and the termination structure includes an edge electrode and the gate oxide between the edge electrode and the sidewall of the second trench;
forming first and second source regions of a first conductivity type in the semiconductor substrate adjacent both the first side and the second side of the gate structure; and
forming a third source region in the semiconductor substrate adjacent to and contacting the sidewall of the second trench at the active region facing side of the termination structure.

2. The method of claim 1 , wherein providing the semiconductor substrate comprises:
providing a first semiconductor layer having the first conductivity type and defining the bottom surface, wherein the first semiconductor layer corresponds to a drain of the device; and
epitaxially forming a second semiconductor layer having the first conductivity type over the first semiconductor layer and defining the top surface, wherein the first and second trenches extend from the top surface into but not through the second semiconductor layer, and portions of the second semiconductor layer underlying the gate structure and the termination structure correspond to drift spaces of the device.

3. The method of claim 1 , further comprising:
forming a gate feed structure above the top surface in the edge region in contact with the termination structure and extending over the device perimeter facing side of the termination structure toward a perimeter of the device.

4. The method of claim 1 , wherein the termination structure substantially surrounds the active region.

5. The method of claim 1 , further comprising:
forming a body region of a second conductivity type in the semiconductor substrate between the gate structure and the termination structure, wherein the body region extends from the first side of the gate structure to the active region facing side of the termination structure, and wherein the first and third source regions are formed in the body region.

6. The method of claim 1 , further comprising:
forming at least one additional gate structure in at least one additional trench in parallel with the first trench; and
forming additional source regions in the semiconductor substrate adjacent both sides of the at least one additional gate structure.

7. A method for forming a semiconductor device, comprising:
providing a semiconductor substrate having a top surface, a bottom surface, an active region, and an edge region;
forming a gate structure in a first trench in the active region of the semiconductor substrate, wherein the gate structure has a first side and a second side;
forming a termination structure in a second trench in the edge region of the semiconductor substrate, wherein the termination structure has an active region facing side and a device perimeter facing side, and wherein the termination structure substantially surrounds the active region;
forming first and second source regions of a first conductivity type in the semiconductor substrate adjacent both the first side and the second side of the gate structure; and
forming a third source region in the semiconductor substrate adjacent the active region facing side of the termination structure;
forming an extension electrode in a third trench in the edge region, wherein the extension electrode extends from the device perimeter facing side of the termination structure; and
forming a gate feed structure above the top surface in the edge region in contact with an end of the extension electrode and extending toward a perimeter of the device.

8. A method for forming a semiconductor device, comprising:
providing a semiconductor substrate having a top surface, a bottom surface, an active region, and an edge region;
forming a gate structure in a first trench in the active region of the semiconductor substrate, wherein the gate structure has a first side and a second side, and the gate structure includes a gate electrode and a gate oxide between the gate electrode and the semiconductor substrate;
forming a termination structure in a second trench in the edge region of the semiconductor substrate, wherein the termination structure has an active region facing side and a device perimeter facing side, the second trench is partially defined by a sidewall at the active region facing side of the termination structure, and the termination structure includes an edge electrode and the gate oxide between the edge electrode and the sidewall of the second trench;
forming a body region of a second conductivity type in the semiconductor substrate between the gate structure and the termination structure, wherein the body region extends from the first side of the gate structure to the active region facing side of the termination structure;
forming an enhanced body region of the second conductivity type and a higher doping density in the body region;
forming first and second source regions of a first conductivity type in the semiconductor substrate adjacent both the first side and the second side of the gate structure, wherein the first source region is formed in the body region; and
forming a third source region in the semiconductor substrate adjacent to and contacting the sidewall of the second trench at the active region facing side of the termination structure, wherein the third source region is formed in the body region.

9. A method for forming a trench metal oxide semiconductor device, comprising:
providing a semiconductor substrate having a top surface, a bottom surface, an active region, and an edge region;
forming a plurality of parallel gate structures in a plurality of parallel first trenches in the active region of the semiconductor substrate, wherein each of the gate structures has a first side and a second side, and each of the gate structures includes a gate electrode and a gate oxide between the gate electrode and the semiconductor substrate;
forming a termination structure in a second trench in the edge region of the semiconductor substrate, wherein the termination structure has an active region facing side and a device perimeter facing side, the second trench is partially defined by a sidewall at the active region facing side of the termination structure, and the termination structure includes an edge electrode and the gate oxide between the edge electrode and the sidewall of the second trench;
forming first and second source regions of a first conductivity type in the semiconductor substrate adjacent both the first sides and the second sides of the gate structures; and
forming a third source region in the semiconductor substrate adjacent to and contacting the sidewall of the second trench at the active region facing side of the termination structure.

10. The method of claim 9 , further comprising:
forming a gate feed structure above the top surface in the edge region in contact with the termination structure and extending over the device perimeter facing side of th

Assignees

• Wang Peilin
• Chen Jingjing
• De Fresart Edouard D
• Freescale Semiconductor Inc

Inventors

• Wang Peilin
• Chen Jingjing
• De Fresart Edouard D

Classifications

• H10D64/513

  within recesses in the substrate, e.g. trench gates, groove gates or buried gates · CPC title

• H10D62/155

  Shapes  (cell layout of DMOS H10D62/127) · CPC title

• H10D64/519

  characterised by their top-view geometrical layouts · CPC title

• H10D64/517

  characterised by the conducting layers · CPC title

• H10D64/117

  Recessed field plates, e.g. trench field plates or buried field plates · CPC title