Copper wiring structure forming method

US9368418B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9368418-B2
Application numberUS-201414464684-A
CountryUS
Kind codeB2
Filing dateAug 20, 2014
Priority dateAug 22, 2013
Publication dateJun 14, 2016
Grant dateJun 14, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In a Cu wiring structure forming method, a barrier film serving as a Cu diffusion barrier is formed at least on a surface of a recess in a first insulating film formed on a substrate, and the recess is filled with an Al-containing Cu film. A Cu wiring is formed from the Al-containing Cu film, and a cap layer including a Ru film is formed on the Cu wiring. Further, an interface layer containing a Ru—Al alloy is formed at an interface between the Cu wiring and the cap layer by heat generated in forming the cap layer or by a heat treatment performed after forming the cap layer. A second insulating film is formed on the cap layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A Cu wiring structure forming method, comprising: providing a first insulating film having a recess on a substrate; forming a barrier film serving as a Cu diffusion barrier at least on a surface of the recess of the first insulating film on a substrate; filling the recess with an Al-containing Cu film; forming an additional layer on the Al-containing Cu film; forming a Cu wiring by planarization, in which the additional layer, the Al-containing Cu film and the barrier film outside the recess are removed; forming a cap layer including a Ru film on the Cu wiring; forming an interface layer containing a Ru—Al alloy at an interface between the Cu wiring and the cap layer by heat generated in forming the cap layer or by a heat treatment performed after forming the cap layer; and forming a second insulating film on the cap layer. 2. The Cu wiring structure forming method of claim 1 , wherein the Al-containing Cu film includes Cu and a Cu—Al alloy, and an amount of the Cu is greater than an amount of the Cu—Al alloy. 3. The Cu wiring structure forming method of claim 2 , further comprising forming a Ru film after said forming the barrier film before said filling the recess with the Al-containing Cu film. 4. The Cu wiring structure forming method of claim 1 , wherein the Al-containing Cu film is a Cu—Al alloy film. 5. The Cu wiring structure forming method of claim 4 , further comprising providing an apparatus having a processing chamber where the substrate is accommodated, wherein the Cu—Al alloy film is formed by generating a plasma from a plasma generation gas in the processing chamber, scattering particles from a target made of a Cu—Al alloy, ionizing the particles scattered in the plasma, and attracting ions onto the substrate by applying a bias power to the substrate. 6. The Cu wiring structure forming method of claim 4 , further comprising forming a Ru film after said forming the barrier film before said filling the recess with the Al-containing Cu film. 7. The Cu wiring structure forming method of claim 1 , wherein said filling the recess with the Al-containing Cu film includes forming a Cu—Al alloy film in the recess and then forming a pure Cu film. 8. The Cu wiring structure forming method of claim 7 , wherein the Cu—Al alloy film is formed by a physical vapor deposition (PVD), and the pure Cu film is formed by a plating or the PVD. 9. The Cu wiring structure forming method of claim 7 , further comprising forming a Ru film after said forming the barrier film before said filling the recess with the Al-containing Cu film. 10. The Cu wiring structure forming method of claim 1 , wherein said filling the recess with the Al-containing Cu film includes filling a pure Cu film in the recess and then forming a Cu—Al alloy at an upper portion of the pure Cu film. 11. The Cu wiring structure forming method of claim 10 , wherein the Cu—Al alloy is formed at the upper portion of the pure Cu film by diffusing Al to the top surface of the pure Cu film. 12. The Cu wiring structure forming method of claim 10 , further comprising forming a Ru film after said forming the barrier film before said filling the recess with the Al-containing Cu film. 13. The Cu wiring structure forming method of claim 1 , further comprising forming a Ru film after said forming the barrier film before said filling the recess with the Al-containing Cu film. 14. The Cu wiring structure forming method of claim 13 , wherein the Ru film is formed by a chemical vapor deposition. 15. The Cu wiring structure forming method of claim 1 , wherein each of the first insulting film and the second insulating film is a Low-k film and serves as an interlayer insulating film. 16. The Cu wiring structure forming method of claim 1 , wherein the planarization is carried out by a polishing process. 17. The Cu wiring structure forming method of claim 1 , wherein the barrier film is selected from a group consisting of a Ti film, a TiN film, a Ta film, a TaN film, a Ta/TaN bilayered film, a TaCN film, a W film, a WN film, a WCN film, a Zr film, a ZrN film, a V film, a VN film, a Nb film and a NbN film. 18. A non-transitory computer-readable storage medium storing a program executed on a computer to control a Cu wiring forming system, wherein the program, when executed on the computer, controls the Cu wiring forming system to perform the Cu wiring structure forming method described in claim 1 .

Assignees

Inventors

Classifications

  • Physical vapour deposition [PVD] · CPC title

  • Copper alloys · CPC title

  • H10W20/425Primary

    Barrier, adhesion or liner layers · CPC title

  • H10W20/056Primary

    by filling conductive material into holes, grooves or trenches · CPC title

  • by diffusing alloying elements · CPC title

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What does patent US9368418B2 cover?
In a Cu wiring structure forming method, a barrier film serving as a Cu diffusion barrier is formed at least on a surface of a recess in a first insulating film formed on a substrate, and the recess is filled with an Al-containing Cu film. A Cu wiring is formed from the Al-containing Cu film, and a cap layer including a Ru film is formed on the Cu wiring. Further, an interface layer containing …
Who is the assignee on this patent?
Tokyo Electron Ltd
What technology area does this patent fall under?
Primary CPC classification H10W20/425. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 14 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).